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| author | Palmer Dabbelt <palmer@sifive.com> | 2017-11-28 14:03:55 -0800 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@sifive.com> | 2017-11-28 14:03:55 -0800 |
| commit | 3343eb6806f365b9e3d451040671fa9336e57513 (patch) | |
| tree | 8b087a641a0998459b4472d6eef62d6204c78488 | |
| parent | 61a60d35b7d1b0b3a31bc21d15805a3654f60920 (diff) | |
| download | linux-tile-3343eb6806f365b9e3d451040671fa9336e57513.tar.gz | |
RISC-V: Remove smb_mb__{before,after}_spinlock()
These are obselete.
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
| -rw-r--r-- | arch/riscv/include/asm/barrier.h | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/riscv/include/asm/barrier.h b/arch/riscv/include/asm/barrier.h index 455ee16127fbcc..773c4e039cd728 100644 --- a/arch/riscv/include/asm/barrier.h +++ b/arch/riscv/include/asm/barrier.h @@ -38,14 +38,6 @@ #define smp_rmb() RISCV_FENCE(r,r) #define smp_wmb() RISCV_FENCE(w,w) -/* - * These barriers prevent accesses performed outside a spinlock from being moved - * inside a spinlock. Since RISC-V sets the aq/rl bits on our spinlock only - * enforce release consistency, we need full fences here. - */ -#define smb_mb__before_spinlock() smp_mb() -#define smb_mb__after_spinlock() smp_mb() - #include <asm-generic/barrier.h> #endif /* __ASSEMBLY__ */ |