mips: Namespace type helpers under RSEQ_ASM_*

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Change-Id: If509780615849c0bf69b36a4363a6ff146b22c50

2 files changed, 70 insertions, 70 deletions

diff --git a/include/rseq/rseq-mips-bits.h b/include/rseq/rseq-mips-bits.h
index 54cdf9a..35daf1e 100644
--- a/include/rseq/rseq-mips-bits.h
+++ b/include/rseq/rseq-mips-bits.h
@@ -33,16 +33,16 @@ int RSEQ_TEMPLATE_IDENTIFIER(rseq_load_cbne_store__ptr)(intptr_t *v, intptr_t ex
 		RSEQ_ASM_STORE_RSEQ_CS(1, 3f, rseq_cs)
 		RSEQ_ASM_CBNE_CPU_ID(cpu_id, current_cpu_id, 4f)
 		RSEQ_INJECT_ASM(3)
-		LONG_L " $4, %[v]\n\t"
+		RSEQ_ASM_LONG_L " $4, %[v]\n\t"
 		"bne $4, %[expect], %l[ne]\n\t"
 		RSEQ_INJECT_ASM(4)
 #ifdef RSEQ_COMPARE_TWICE
 		RSEQ_ASM_CBNE_CPU_ID(cpu_id, current_cpu_id, %l[error1])
-		LONG_L " $4, %[v]\n\t"
+		RSEQ_ASM_LONG_L " $4, %[v]\n\t"
 		"bne $4, %[expect], %l[error2]\n\t"
 #endif
 		/* final store */
-		LONG_S " %[newv], %[v]\n\t"
+		RSEQ_ASM_LONG_S " %[newv], %[v]\n\t"
 		"2:\n\t"
 		RSEQ_INJECT_ASM(5)
 		"b 5f\n\t"
@@ -94,19 +94,19 @@ int RSEQ_TEMPLATE_IDENTIFIER(rseq_load_cbeq_store_add_load_store__ptr)(intptr_t
 		RSEQ_ASM_STORE_RSEQ_CS(1, 3f, rseq_cs)
 		RSEQ_ASM_CBNE_CPU_ID(cpu_id, current_cpu_id, 4f)
 		RSEQ_INJECT_ASM(3)
-		LONG_L " $4, %[v]\n\t"
+		RSEQ_ASM_LONG_L " $4, %[v]\n\t"
 		"beq $4, %[expectnot], %l[eq]\n\t"
 		RSEQ_INJECT_ASM(4)
 #ifdef RSEQ_COMPARE_TWICE
 		RSEQ_ASM_CBNE_CPU_ID(cpu_id, current_cpu_id, %l[error1])
-		LONG_L " $4, %[v]\n\t"
+		RSEQ_ASM_LONG_L " $4, %[v]\n\t"
 		"beq $4, %[expectnot], %l[error2]\n\t"
 #endif
-		LONG_S " $4, %[load]\n\t"
-		LONG_ADDI " $4, %[voffp]\n\t"
-		LONG_L " $4, 0($4)\n\t"
+		RSEQ_ASM_LONG_S " $4, %[load]\n\t"
+		RSEQ_ASM_LONG_ADDI " $4, %[voffp]\n\t"
+		RSEQ_ASM_LONG_L " $4, 0($4)\n\t"
 		/* final store */
-		LONG_S " $4, %[v]\n\t"
+		RSEQ_ASM_LONG_S " $4, %[v]\n\t"
 		"2:\n\t"
 		RSEQ_INJECT_ASM(5)
 		"b 5f\n\t"
@@ -160,10 +160,10 @@ int RSEQ_TEMPLATE_IDENTIFIER(rseq_load_add_store__ptr)(intptr_t *v, intptr_t cou
 #ifdef RSEQ_COMPARE_TWICE
 		RSEQ_ASM_CBNE_CPU_ID(cpu_id, current_cpu_id, %l[error1])
 #endif
-		LONG_L " $4, %[v]\n\t"
-		LONG_ADDI " $4, %[count]\n\t"
+		RSEQ_ASM_LONG_L " $4, %[v]\n\t"
+		RSEQ_ASM_LONG_ADDI " $4, %[count]\n\t"
 		/* final store */
-		LONG_S " $4, %[v]\n\t"
+		RSEQ_ASM_LONG_S " $4, %[v]\n\t"
 		"2:\n\t"
 		RSEQ_INJECT_ASM(4)
 		"b 5f\n\t"
@@ -212,21 +212,21 @@ int RSEQ_TEMPLATE_IDENTIFIER(rseq_load_cbne_load_cbne_store__ptr)(intptr_t *v, i
 		RSEQ_ASM_STORE_RSEQ_CS(1, 3f, rseq_cs)
 		RSEQ_ASM_CBNE_CPU_ID(cpu_id, current_cpu_id, 4f)
 		RSEQ_INJECT_ASM(3)
-		LONG_L " $4, %[v]\n\t"
+		RSEQ_ASM_LONG_L " $4, %[v]\n\t"
 		"bne $4, %[expect], %l[ne]\n\t"
 		RSEQ_INJECT_ASM(4)
-		LONG_L " $4, %[v2]\n\t"
+		RSEQ_ASM_LONG_L " $4, %[v2]\n\t"
 		"bne $4, %[expect2], %l[ne]\n\t"
 		RSEQ_INJECT_ASM(5)
 #ifdef RSEQ_COMPARE_TWICE
 		RSEQ_ASM_CBNE_CPU_ID(cpu_id, current_cpu_id, %l[error1])
-		LONG_L " $4, %[v]\n\t"
+		RSEQ_ASM_LONG_L " $4, %[v]\n\t"
 		"bne $4, %[expect], %l[error2]\n\t"
-		LONG_L " $4, %[v2]\n\t"
+		RSEQ_ASM_LONG_L " $4, %[v2]\n\t"
 		"bne $4, %[expect2], %l[error3]\n\t"
 #endif
 		/* final store */
-		LONG_S " %[newv], %[v]\n\t"
+		RSEQ_ASM_LONG_S " %[newv], %[v]\n\t"
 		"2:\n\t"
 		RSEQ_INJECT_ASM(6)
 		"b 5f\n\t"
@@ -291,22 +291,22 @@ int RSEQ_TEMPLATE_IDENTIFIER(rseq_load_cbne_store_store__ptr)(intptr_t *v, intpt
 		RSEQ_ASM_STORE_RSEQ_CS(1, 3f, rseq_cs)
 		RSEQ_ASM_CBNE_CPU_ID(cpu_id, current_cpu_id, 4f)
 		RSEQ_INJECT_ASM(3)
-		LONG_L " $4, %[v]\n\t"
+		RSEQ_ASM_LONG_L " $4, %[v]\n\t"
 		"bne $4, %[expect], %l[ne]\n\t"
 		RSEQ_INJECT_ASM(4)
 #ifdef RSEQ_COMPARE_TWICE
 		RSEQ_ASM_CBNE_CPU_ID(cpu_id, current_cpu_id, %l[error1])
-		LONG_L " $4, %[v]\n\t"
+		RSEQ_ASM_LONG_L " $4, %[v]\n\t"
 		"bne $4, %[expect], %l[error2]\n\t"
 #endif
 		/* try store */
-		LONG_S " %[newv2], %[v2]\n\t"
+		RSEQ_ASM_LONG_S " %[newv2], %[v2]\n\t"
 		RSEQ_INJECT_ASM(5)
 #ifdef RSEQ_TEMPLATE_MO_RELEASE
 		"sync\n\t"	/* full sync provides store-release */
 #endif
 		/* final store */
-		LONG_S " %[newv], %[v]\n\t"
+		RSEQ_ASM_LONG_S " %[newv], %[v]\n\t"
 		"2:\n\t"
 		RSEQ_INJECT_ASM(6)
 		"b 5f\n\t"
@@ -361,19 +361,19 @@ int RSEQ_TEMPLATE_IDENTIFIER(rseq_load_cbne_memcpy_store__ptr)(intptr_t *v, intp
 		RSEQ_ASM_DEFINE_EXIT_POINT(1f, %l[error1])
 		RSEQ_ASM_DEFINE_EXIT_POINT(1f, %l[error2])
 #endif
-		LONG_S " %[src], %[rseq_scratch0]\n\t"
-		LONG_S "  %[dst], %[rseq_scratch1]\n\t"
-		LONG_S " %[len], %[rseq_scratch2]\n\t"
+		RSEQ_ASM_LONG_S " %[src], %[rseq_scratch0]\n\t"
+		RSEQ_ASM_LONG_S "  %[dst], %[rseq_scratch1]\n\t"
+		RSEQ_ASM_LONG_S " %[len], %[rseq_scratch2]\n\t"
 		/* Start rseq by storing table entry pointer into rseq_cs. */
 		RSEQ_ASM_STORE_RSEQ_CS(1, 3f, rseq_cs)
 		RSEQ_ASM_CBNE_CPU_ID(cpu_id, current_cpu_id, 4f)
 		RSEQ_INJECT_ASM(3)
-		LONG_L " $4, %[v]\n\t"
+		RSEQ_ASM_LONG_L " $4, %[v]\n\t"
 		"bne $4, %[expect], 5f\n\t"
 		RSEQ_INJECT_ASM(4)
 #ifdef RSEQ_COMPARE_TWICE
 		RSEQ_ASM_CBNE_CPU_ID(cpu_id, current_cpu_id, 6f)
-		LONG_L " $4, %[v]\n\t"
+		RSEQ_ASM_LONG_L " $4, %[v]\n\t"
 		"bne $4, %[expect], 7f\n\t"
 #endif
 		/* try memcpy */
@@ -381,9 +381,9 @@ int RSEQ_TEMPLATE_IDENTIFIER(rseq_load_cbne_memcpy_store__ptr)(intptr_t *v, intp
 		"222:\n\t" \
 		"lb   $4, 0(%[src])\n\t" \
 		"sb   $4, 0(%[dst])\n\t" \
-		LONG_ADDI " %[src], 1\n\t" \
-		LONG_ADDI " %[dst], 1\n\t" \
-		LONG_ADDI " %[len], -1\n\t" \
+		RSEQ_ASM_LONG_ADDI " %[src], 1\n\t" \
+		RSEQ_ASM_LONG_ADDI " %[dst], 1\n\t" \
+		RSEQ_ASM_LONG_ADDI " %[len], -1\n\t" \
 		"bnez %[len], 222b\n\t" \
 		"333:\n\t" \
 		RSEQ_INJECT_ASM(5)
@@ -391,38 +391,38 @@ int RSEQ_TEMPLATE_IDENTIFIER(rseq_load_cbne_memcpy_store__ptr)(intptr_t *v, intp
 		"sync\n\t"	/* full sync provides store-release */
 #endif
 		/* final store */
-		LONG_S " %[newv], %[v]\n\t"
+		RSEQ_ASM_LONG_S " %[newv], %[v]\n\t"
 		"2:\n\t"
 		RSEQ_INJECT_ASM(6)
 		/* teardown */
-		LONG_L " %[len], %[rseq_scratch2]\n\t"
-		LONG_L " %[dst], %[rseq_scratch1]\n\t"
-		LONG_L " %[src], %[rseq_scratch0]\n\t"
+		RSEQ_ASM_LONG_L " %[len], %[rseq_scratch2]\n\t"
+		RSEQ_ASM_LONG_L " %[dst], %[rseq_scratch1]\n\t"
+		RSEQ_ASM_LONG_L " %[src], %[rseq_scratch0]\n\t"
 		"b 8f\n\t"
 		RSEQ_ASM_DEFINE_ABORT(3, 4,
 				      /* teardown */
-				      LONG_L " %[len], %[rseq_scratch2]\n\t"
-				      LONG_L " %[dst], %[rseq_scratch1]\n\t"
-				      LONG_L " %[src], %[rseq_scratch0]\n\t",
+				      RSEQ_ASM_LONG_L " %[len], %[rseq_scratch2]\n\t"
+				      RSEQ_ASM_LONG_L " %[dst], %[rseq_scratch1]\n\t"
+				      RSEQ_ASM_LONG_L " %[src], %[rseq_scratch0]\n\t",
 				      abort, 1b, 2b, 4f)
 		RSEQ_ASM_DEFINE_TEARDOWN(5,
 					/* teardown */
-					LONG_L " %[len], %[rseq_scratch2]\n\t"
-					LONG_L " %[dst], %[rseq_scratch1]\n\t"
-					LONG_L " %[src], %[rseq_scratch0]\n\t",
+					RSEQ_ASM_LONG_L " %[len], %[rseq_scratch2]\n\t"
+					RSEQ_ASM_LONG_L " %[dst], %[rseq_scratch1]\n\t"
+					RSEQ_ASM_LONG_L " %[src], %[rseq_scratch0]\n\t",
 					ne)
 #ifdef RSEQ_COMPARE_TWICE
 		RSEQ_ASM_DEFINE_TEARDOWN(6,
 					/* teardown */
-					LONG_L " %[len], %[rseq_scratch2]\n\t"
-					LONG_L " %[dst], %[rseq_scratch1]\n\t"
-					LONG_L " %[src], %[rseq_scratch0]\n\t",
+					RSEQ_ASM_LONG_L " %[len], %[rseq_scratch2]\n\t"
+					RSEQ_ASM_LONG_L " %[dst], %[rseq_scratch1]\n\t"
+					RSEQ_ASM_LONG_L " %[src], %[rseq_scratch0]\n\t",
 					error1)
 		RSEQ_ASM_DEFINE_TEARDOWN(7,
 					/* teardown */
-					LONG_L " %[len], %[rseq_scratch2]\n\t"
-					LONG_L " %[dst], %[rseq_scratch1]\n\t"
-					LONG_L " %[src], %[rseq_scratch0]\n\t",
+					RSEQ_ASM_LONG_L " %[len], %[rseq_scratch2]\n\t"
+					RSEQ_ASM_LONG_L " %[dst], %[rseq_scratch1]\n\t"
+					RSEQ_ASM_LONG_L " %[src], %[rseq_scratch0]\n\t",
 					error2)
 #endif
 		"8:\n\t"
diff --git a/include/rseq/rseq-mips.h b/include/rseq/rseq-mips.h
index 2e313d3..ea04602 100644
--- a/include/rseq/rseq-mips.h
+++ b/include/rseq/rseq-mips.h
@@ -60,22 +60,22 @@ do {									\
 } while (0)
 
 #if _MIPS_SZLONG == 64
-# define LONG			".dword"
-# define LONG_LA		"dla"
-# define LONG_L			"ld"
-# define LONG_S			"sd"
-# define LONG_ADDI		"daddiu"
-# define U32_U64_PAD(x)		x
+# define RSEQ_ASM_LONG			".dword"
+# define RSEQ_ASM_LONG_LA		"dla"
+# define RSEQ_ASM_LONG_L		"ld"
+# define RSEQ_ASM_LONG_S		"sd"
+# define RSEQ_ASM_LONG_ADDI		"daddiu"
+# define RSEQ_ASM_U32_U64_PAD(x)	x
 #elif _MIPS_SZLONG == 32
-# define LONG			".word"
-# define LONG_LA		"la"
-# define LONG_L			"lw"
-# define LONG_S			"sw"
-# define LONG_ADDI		"addiu"
+# define RSEQ_ASM_LONG			".word"
+# define RSEQ_ASM_LONG_LA		"la"
+# define RSEQ_ASM_LONG_L		"lw"
+# define RSEQ_ASM_LONG_S		"sw"
+# define RSEQ_ASM_LONG_ADDI		"addiu"
 # ifdef __BIG_ENDIAN
-#  define U32_U64_PAD(x)	"0x0, " x
+#  define RSEQ_ASM_U32_U64_PAD(x)	"0x0, " x
 # else
-#  define U32_U64_PAD(x)	x ", 0x0"
+#  define RSEQ_ASM_U32_U64_PAD(x)	x ", 0x0"
 # endif
 #else
 # error unsupported _MIPS_SZLONG
@@ -85,14 +85,14 @@ do {									\
 				post_commit_offset, abort_ip) \
 		".pushsection __rseq_cs, \"aw\"\n\t" \
 		".balign 32\n\t" \
-		__rseq_str(label) ":\n\t"					\
+		__rseq_str(label) ":\n\t" \
 		".word " __rseq_str(version) ", " __rseq_str(flags) "\n\t" \
-		LONG " " U32_U64_PAD(__rseq_str(start_ip)) "\n\t" \
-		LONG " " U32_U64_PAD(__rseq_str(post_commit_offset)) "\n\t" \
-		LONG " " U32_U64_PAD(__rseq_str(abort_ip)) "\n\t" \
+		RSEQ_ASM_LONG " " RSEQ_ASM_U32_U64_PAD(__rseq_str(start_ip)) "\n\t" \
+		RSEQ_ASM_LONG " " RSEQ_ASM_U32_U64_PAD(__rseq_str(post_commit_offset)) "\n\t" \
+		RSEQ_ASM_LONG " " RSEQ_ASM_U32_U64_PAD(__rseq_str(abort_ip)) "\n\t" \
 		".popsection\n\t" \
 		".pushsection __rseq_cs_ptr_array, \"aw\"\n\t" \
-		LONG " " U32_U64_PAD(__rseq_str(label) "b") "\n\t" \
+		RSEQ_ASM_LONG " " RSEQ_ASM_U32_U64_PAD(__rseq_str(label) "b") "\n\t" \
 		".popsection\n\t"
 
 #define RSEQ_ASM_DEFINE_TABLE(label, start_ip, post_commit_ip, abort_ip) \
@@ -109,14 +109,14 @@ do {									\
  */
 #define RSEQ_ASM_DEFINE_EXIT_POINT(start_ip, exit_ip) \
 		".pushsection __rseq_exit_point_array, \"aw\"\n\t" \
-		LONG " " U32_U64_PAD(__rseq_str(start_ip)) "\n\t" \
-		LONG " " U32_U64_PAD(__rseq_str(exit_ip)) "\n\t" \
+		RSEQ_ASM_LONG " " RSEQ_ASM_U32_U64_PAD(__rseq_str(start_ip)) "\n\t" \
+		RSEQ_ASM_LONG " " RSEQ_ASM_U32_U64_PAD(__rseq_str(exit_ip)) "\n\t" \
 		".popsection\n\t"
 
 #define RSEQ_ASM_STORE_RSEQ_CS(label, cs_label, rseq_cs) \
 		RSEQ_INJECT_ASM(1) \
-		LONG_LA " $4, " __rseq_str(cs_label) "\n\t" \
-		LONG_S  " $4, %[" __rseq_str(rseq_cs) "]\n\t" \
+		RSEQ_ASM_LONG_LA " $4, " __rseq_str(cs_label) "\n\t" \
+		RSEQ_ASM_LONG_S  " $4, %[" __rseq_str(rseq_cs) "]\n\t" \
 		__rseq_str(label) ":\n\t"
 
 #define RSEQ_ASM_CBNE_CPU_ID(cpu_id, current_cpu_id, label) \
@@ -130,9 +130,9 @@ do {									\
 		".balign 32\n\t" \
 		__rseq_str(table_label) ":\n\t" \
 		".word " __rseq_str(version) ", " __rseq_str(flags) "\n\t" \
-		LONG " " U32_U64_PAD(__rseq_str(start_ip)) "\n\t" \
-		LONG " " U32_U64_PAD(__rseq_str(post_commit_offset)) "\n\t" \
-		LONG " " U32_U64_PAD(__rseq_str(abort_ip)) "\n\t" \
+		RSEQ_ASM_LONG " " RSEQ_ASM_U32_U64_PAD(__rseq_str(start_ip)) "\n\t" \
+		RSEQ_ASM_LONG " " RSEQ_ASM_U32_U64_PAD(__rseq_str(post_commit_offset)) "\n\t" \
+		RSEQ_ASM_LONG " " RSEQ_ASM_U32_U64_PAD(__rseq_str(abort_ip)) "\n\t" \
 		".word " __rseq_str(RSEQ_SIG) "\n\t" \
 		__rseq_str(label) ":\n\t" \
 		teardown \