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| author | Mathieu Desnoyers <mathieu.desnoyers@efficios.com> | 2024-02-27 15:45:32 -0500 |
|---|---|---|
| committer | Mathieu Desnoyers <mathieu.desnoyers@efficios.com> | 2024-02-27 17:28:07 -0500 |
| commit | 28880e72adc5d600b99eb1b2b838f298184660c7 (patch) | |
| tree | cf2403a5de709ccaa223127ea096eef38553b00b | |
| parent | 6020ff66679959a610f6bb4678d268fcb6c716ae (diff) | |
| download | librseq-28880e72adc5d600b99eb1b2b838f298184660c7.tar.gz | |
riscv: Rename RSEQ_ASM_OP_R_BAD_MEMCPY to RSEQ_ASM_OP_R_BYTEWISE_MEMCPY
This is more descriptive.
Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Change-Id: I3f397cc63f60c2d806b1665de9b6bae4106f1db1
| -rw-r--r-- | include/rseq/rseq-riscv-bits.h | 2 | ||||
| -rw-r--r-- | include/rseq/rseq-riscv.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/include/rseq/rseq-riscv-bits.h b/include/rseq/rseq-riscv-bits.h index 1d923ba..3cc8ece 100644 --- a/include/rseq/rseq-riscv-bits.h +++ b/include/rseq/rseq-riscv-bits.h @@ -364,7 +364,7 @@ int RSEQ_TEMPLATE_IDENTIFIER(rseq_load_cbne_memcpy_store__ptr)(intptr_t *v, intp RSEQ_ASM_CBNE_CPU_ID(cpu_id, current_cpu_id, "%l[error1]") RSEQ_ASM_OP_CBNE(v, expect, "%l[error2]") #endif - RSEQ_ASM_OP_R_BAD_MEMCPY(dst, src, len) + RSEQ_ASM_OP_R_BYTEWISE_MEMCPY(dst, src, len) RSEQ_INJECT_ASM(5) #ifdef RSEQ_TEMPLATE_MO_RELEASE RSEQ_ASM_OP_FINAL_STORE_RELEASE(newv, v, 3) diff --git a/include/rseq/rseq-riscv.h b/include/rseq/rseq-riscv.h index 2475b72..3fb7232 100644 --- a/include/rseq/rseq-riscv.h +++ b/include/rseq/rseq-riscv.h @@ -147,7 +147,7 @@ do { \ REG_S RSEQ_ASM_TMP_REG_1 ", %[" __rseq_str(var) "]\n" \ __rseq_str(post_commit_label) ":\n" -#define RSEQ_ASM_OP_R_BAD_MEMCPY(dst, src, len) \ +#define RSEQ_ASM_OP_R_BYTEWISE_MEMCPY(dst, src, len) \ "beqz %[" __rseq_str(len) "], 333f\n" \ "mv " RSEQ_ASM_TMP_REG_1 ", %[" __rseq_str(len) "]\n" \ "mv " RSEQ_ASM_TMP_REG_2 ", %[" __rseq_str(src) "]\n" \ |