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Working with the development community

  • Development process
  • Submitting patches
  • Code of conduct
  • Maintainer handbook
  • All development-process docs

Internal API manuals

  • Core API
  • Driver APIs
    • General information for driver authors
    • Useful support libraries
    • Bus-level documentation
      • Auxiliary Bus
      • Compute Express Link
      • EISA bus support
      • Firewire (IEEE 1394) driver Interface Guide
      • I3C subsystem
      • ISA Drivers
      • MEN Chameleon Bus
      • The Linux PCI driver implementer’s API guide
      • The Linux RapidIO Subsystem
      • Linux kernel SLIMbus support
      • Linux USB API
      • Virtio
      • VME Device Drivers
      • W1: Dallas’ 1-wire bus
      • Xillybus driver for generic FPGA interface
    • Subsystem-specific APIs
  • Subsystems
  • Locking

Development tools and processes

  • Licensing rules
  • Writing documentation
  • Development tools
  • Testing guide
  • Hacking guide
  • Tracing
  • Fault injection
  • Livepatching
  • Rust

User-oriented documentation

  • Administration
  • Build system
  • Reporting issues
  • Userspace tools
  • Userspace API

Firmware-related documentation

  • Firmware
  • Firmware and Devicetree

Architecture-specific documentation

  • CPU architectures

Other documentation

  • Unsorted documentation

Translations

  • Translations

This Page

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Compute Express Link: Linux Conventions¶

There exists shipping platforms that bend or break CXL specification expectations. Record the details and the rationale for those deviations. Borrow the ACPI Code First template format to capture the assumptions and tradeoffs such that multiple platform implementations can follow the same convention.

Contents

  • Resolve conflict between CFMWS, Platform Memory Holes, and Endpoint Decoders
  • ACPI PRM CXL Address Translation
  • Template File
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