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AgeCommit message (Expand)AuthorFilesLines
2012-09-27Emit debug_insn for CPU_LOG_TB_OP_OPT as well.Richard Henderson1-1/+1
2012-09-21target-sh4: remove useless codeAurelien Jarno1-4/+0
2012-09-21target-sh4: cleanup DisasContextAurelien Jarno1-30/+26
2012-09-21target-sh4: rework exceptions handlingAurelien Jarno3-30/+32
2012-09-21target-sh4: remove gen_clr_t() and gen_set_t()Aurelien Jarno1-13/+3
2012-09-21target-sh4: optimize swap.wAurelien Jarno1-11/+1
2012-09-21target-sh4: optimize xtrctAurelien Jarno1-1/+0
2012-09-21target-sh4: implement addv and subv using TCGAurelien Jarno3-62/+34
2012-09-21target-sh4: implement addc and subc using TCGAurelien Jarno3-36/+36
2012-09-21target-sh4: use float32_muladd() to implement fmacAurelien Jarno1-2/+1
2012-09-21target-sh4: mark a few helpers const and pureAurelien Jarno1-3/+3
2012-09-15target-sh4: switch to AREG0 free modeBlue Swirl4-188/+194
2012-06-07build: move other target-*/ objects to nested Makefile.objsPaolo Bonzini1-1/+2
2012-06-07build: move libobj-y variable to nested Makefile.objsPaolo Bonzini1-1/+3
2012-06-07build: move obj-TARGET-y variables to nested Makefile.objsPaolo Bonzini1-0/+1
2012-06-04Kill off cpu_state_reset()Andreas Färber1-5/+0
2012-06-04target-sh4: Let cpu_sh4_init() return SuperHCPUAndreas Färber2-4/+12
2012-04-30target-sh4: Start QOM'ifying CPU initAndreas Färber2-2/+11
2012-04-30target-sh4: QOM'ify CPU resetAndreas Färber2-21/+22
2012-04-30target-sh4: QOM'ify CPUAndreas Färber4-1/+135
2012-04-14Use uintptr_t for various op related functionsBlue Swirl1-8/+6
2012-03-14Rename CPUState -> CPUArchStateAndreas Färber1-1/+1
2012-03-14target-sh4: Don't overuse CPUStateAndreas Färber4-44/+44
2012-03-14Rename cpu_reset() to cpu_state_reset()Andreas Färber1-2/+2
2012-02-28target-sh4: Clean includesStefan Weil1-6/+0
2012-01-10target-sh4: ignore ocbp and ocbwb instructionsAurelien Jarno1-11/+3
2012-01-07target-sh4: Fix operands for fipr, ftrv instructionsStefan Weil1-3/+3
2011-12-05Merge remote-tracking branch 'stefanha/trivial-patches' into stagingAnthony Liguori1-1/+1
2011-12-02fix spelling in target sub directoryDong Xu Wang1-1/+1
2011-11-24sh_intc: convert interrupt controller to memory APIBenoît Canet1-0/+3
2011-10-01softmmu_header: pass CPUState to tlb_fillBlue Swirl1-4/+3
2011-08-20Use glib memory allocation and free functionsAnthony Liguori1-1/+1
2011-08-07Remove unused is_softmmu parameter from cpu_handle_mmu_faultBlue Swirl3-4/+4
2011-07-30exec.h cleanupBlue Swirl2-34/+3
2011-06-26Remove exec-all.h include directivesBlue Swirl3-3/+0
2011-06-26Move cpu_has_work and cpu_pc_from_tb to cpu.hBlue Swirl2-11/+13
2011-06-26exec.h: fix coding style and change cpu_has_work to return boolBlue Swirl1-2/+2
2011-06-26cpu_loop_exit: avoid using AREG0Blue Swirl1-5/+5
2011-04-20Remove unused function parameter from cpu_restore_stateStefan Weil1-1/+1
2011-04-20Remove unused function parameters from gen_pc_load and rename the functionStefan Weil1-2/+1
2011-04-12target-sh4: get rid of CPU_{Float,Double}UAurelien Jarno2-158/+92
2011-04-10Fix conversions from pointer to tcg_target_longStefan Weil1-1/+1
2011-03-13inline cpu_halted into sole callerPaolo Bonzini1-10/+0
2011-03-03target-sh4: move intr_at_halt out of cpu_halted()Aurelien Jarno4-4/+4
2011-02-04target-sh4: fix negcAurelien Jarno1-2/+2
2011-01-26target-sh4: update PTEH upon MMU exceptionAlexandre Courbot1-0/+4
2011-01-26sh4: implement missing mmaped TLB read functionsAurelien Jarno2-0/+82
2011-01-26sh4: implement missing mmaped TLB write functionsAurelien Jarno2-3/+67
2011-01-25target-sh4: fix index of address read error exceptionAlexandre Courbot1-1/+1
2011-01-25target-sh4: fix TLB invalidation codeAlexandre Courbot1-2/+2
2011-01-16target-sh4: implement negc using TCGAurelien Jarno3-17/+15
2011-01-16target-sh4: use rotl/rotr when possibleAurelien Jarno1-5/+3
2011-01-15target-sh4: correct use of ! and &Aurelien Jarno1-2/+2
2011-01-14target-sh4: use setcond when possibleAurelien Jarno1-29/+27
2011-01-14target-sh4: log instructions start in TCG codeAurelien Jarno1-0/+4
2011-01-14target-sh4: simplify comparisons after a 'and' opAurelien Jarno1-3/+3
2011-01-14target-sh4: fix reset on r2dAurelien Jarno2-18/+16
2011-01-14target-sh4: optimize exceptionsAurelien Jarno2-15/+12
2011-01-14target-sh4: add ftrv instructionAurelien Jarno3-0/+38
2011-01-14target-sh4: add fipr instructionAurelien Jarno3-0/+33
2011-01-14target-sh4: implement FPU exceptionsAurelien Jarno1-22/+136
2011-01-14target-sh4: implement flush-to-zeroAurelien Jarno2-0/+2
2011-01-14target-sh4: define FPSCR constantsAurelien Jarno3-9/+37
2011-01-14target-sh4: use default-NaN modeAurelien Jarno1-0/+1
2011-01-11target-sh4: fix fpu disabled/illegal exceptionAurelien Jarno1-10/+18
2011-01-10target-sh4: improve TLBAurelien Jarno1-21/+44
2011-01-09target-sh4: implement writes to mmaped ITLBAurelien Jarno2-0/+21
2010-10-30target-xxx: Use fprintf_function (format checking)Stefan Weil2-2/+3
2010-07-12target-sh4: Add support for ldc & stc with sgrAlexandre Courbot1-0/+2
2010-07-12target-sh4: Split the LDST macro into 2 sub-macrosAlexandre Courbot1-2/+6
2010-07-03remove exec-all.h inclusion from cpu.hPaolo Bonzini1-1/+0
2010-07-03move cpu_pc_from_tb to target-*/exec.hPaolo Bonzini2-6/+6
2010-05-05target-sh4: Remove duplicate CPU log.Richard Henderson1-6/+0
2010-04-08remove TARGET_* defines from translate-all.cPaolo Bonzini1-0/+2
2010-03-18Replace assert(0) with abort() or cpu_abort()Blue Swirl3-5/+5
2010-03-17Large page TLB flushPaul Brook1-1/+2
2010-03-12Target specific usermode cleanupPaul Brook1-0/+2
2010-03-12Remove cpu_get_phys_page_debug from userspace emulationPaul Brook1-5/+0
2010-03-12Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.Richard Henderson1-0/+3
2010-02-14Fix incorrect exception_index useBlue Swirl1-1/+1
2010-02-09target-sh4: MMU: separate execute and read/write permissionsAurelien Jarno1-21/+6
2010-02-09target-sh4: MMU: fix store queue addressesAurelien Jarno1-1/+1
2010-02-09target-sh4: MMU: remove dead codeAurelien Jarno1-18/+0
2010-02-09target-sh4: MMU: reduce the size of a TLB entryAurelien Jarno1-12/+11
2010-02-09target-sh4: MMU: optimize UTLB accessesAurelien Jarno1-24/+14
2010-02-09target-sh4: MMU: fix ITLB priviledge checkAurelien Jarno1-1/+1
2010-02-09target-sh4: MMU: simplify call to tlb_set_page()Aurelien Jarno1-6/+3
2010-02-09target-sh4: MMU: fix mem_idx computationAurelien Jarno1-1/+1
2010-02-09sh7750: handle MMUCR TI bitAurelien Jarno2-0/+20
2010-02-08target-sh4: minor optimisationsAurelien Jarno1-26/+26
2010-01-19kill regs_to_env and env_to_regsPaolo Bonzini1-10/+0
2009-10-01Revert "Get rid of _t suffix"Anthony Liguori2-4/+4
2009-10-01Get rid of _t suffixmalc2-4/+4
2009-09-21Fix Sparse warnings about using plain integer as NULL pointerBlue Swirl1-2/+2
2009-09-12Fix sys-queue.h conflict for goodBlue Swirl1-2/+2
2009-08-24cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signalNathan Froyd1-0/+1
2009-07-16Update to a hopefully more future proof FSF addressBlue Swirl5-10/+5
2009-05-21Convert machine registration to use module init functionsAnthony Liguori1-8/+0
2009-05-13Include assert.h from qemu-common.hPaul Brook2-2/+0
2009-04-24qemu: introduce qemu_init_vcpu (Marcelo Tosatti)aliguori1-0/+1
2009-04-24qemu: per-arch cpu_has_work (Marcelo Tosatti)aliguori1-1/+6
2009-04-05Add new command line option -singlestep for tcg single stepping.aurel321-3/+2
2009-04-03SH: Fix linux-user _is_cached typo.edgar_igl1-1/+1
2009-04-03SH: Add cpu_sh4_is_cached for linux-user.edgar_igl1-0/+6
2009-04-01SH: Improve movca.l/ocbi emulation.edgar_igl5-5/+156
2009-03-07The _exit syscall is used for both thread termination in NPTL applications,pbrook1-1/+2
2009-03-03SH4: Fixed last UTLB unused and URB/URC managementaurel321-1/+1
2009-03-03SH4: Fixed last UTLB unusedaurel321-1/+1
2009-03-03SH4: Fixed last UTLB unusedaurel321-1/+1
2009-03-03clean build: Fix remaining sh4 warningsaurel323-13/+9
2009-03-02SH: Implement MOVCO.L and MOVLI.Laurel322-1/+36
2009-02-07SH7750/51: add register BCR3, BCR4, PCR, RTCOR, RTCNT, RTCSR, SDMR2, SDMR3 an...aurel322-0/+3
2009-02-05targets: remove error handling from qemu_malloc() callers (Avi Kivity)aliguori1-2/+0
2009-01-26Log reset events (Jan Kiszka)aliguori1-0/+5
2009-01-15global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)aliguori2-2/+2
2009-01-15Convert references to logfile/loglevel to use qemu_log*() macrosaliguori2-13/+10
2009-01-14sh4: Add FMAC instruction supportaurel323-0/+23
2009-01-04Update FSF address in GPL/LGPL boilerplateaurel325-5/+5
2009-01-01tcg_temp_local_new should take no parameteraurel321-6/+6
2008-12-22Use the ARRAY_SIZE() macro where appropriate.malc1-2/+2
2008-12-13target-sh4: make the initial value of SR easier to readaurel322-1/+5
2008-12-13target-sh4: don't disable FPU instructions in user modeaurel321-1/+1
2008-12-13target-sh4: disable debug codeaurel321-1/+3
2008-12-13target-sh4: add prefi, icbi, syncoaurel322-0/+27
2008-12-13target-sh4: add SH7785 as CPU optionaurel322-1/+8
2008-12-11target-sh4: remove 2 warningsaurel322-4/+4
2008-12-10target-sh4: Add SH bit handling to TLBaurel321-6/+6
2008-12-10target-sh4: check FD bit for FP instructionsaurel321-6/+23
2008-12-07SH4: kill a few warningsaurel321-2/+2
2008-12-07SH4: Implement FD bitaurel324-5/+42
2008-12-07SH4: Eliminate P4 to A7 mangling (Takashi YOSHII).balrog1-12/+0
2008-12-07SH: On-chip PCI controller support (Takashi YOSHII).balrog1-0/+3
2008-12-07Remove FORCE_RET() and RETURN()aurel321-2/+0
2008-11-30Common cpu_loop_exit prototypeaurel321-2/+0
2008-11-25Use sys-queue.h for break/watchpoint managment (Jan Kiszka)aliguori1-2/+2
2008-11-22target-sh4: fix 64-bit fmov to/from memoryaurel321-29/+33
2008-11-21target-sh4: fix TLB/MMU emulationaurel321-36/+29
2008-11-20target-sh4: fix fldi0/fldi1aurel321-4/+2
2008-11-19target-sh4: map FP registers as TCG variablesaurel321-106/+43
2008-11-19target-sh4: use CPU_Float/CPU_Double instead of ugly castsaurel321-40/+102
2008-11-18Refactor and enhance break/watchpoint API (Jan Kiszka)aliguori1-3/+4
2008-11-18Refactor translation block CPU state handling (Jan Kiszka)aliguori1-0/+11
2008-11-18Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)aliguori1-5/+7
2008-11-17TCG variable type checking.pbrook3-308/+313
2008-10-26Fix undeclared symbol warnings from sparseblueswir11-2/+2
2008-10-12SH4: Implement MOVUA.Laurel321-0/+11
2008-10-12SH4: fix single-steppingaurel321-0/+1
2008-10-12SH4: Fix swap.baurel321-1/+4
2008-10-05Silence some warnings about no value returned from non-void functionblueswir11-1/+1
2008-09-21Add concat_i32_i64 op.pbrook1-6/+3
2008-09-20Suppress gcc 4.x -Wpointer-sign (included in -Wall) warningsblueswir11-2/+2
2008-09-15SH4: Privilege check for instructionsaurel321-24/+43
2008-09-15qemu sh4 nptl supportaurel321-0/+5
2008-09-15sh4: doesn't set the cpu_model_straurel321-0/+1
2008-09-15SH4: sleep instruction bug fixaurel323-3/+4
2008-09-02sh4: CPU versioning.aurel322-0/+76
2008-09-02SH4: fix a regression introduced in r5122aurel321-1/+1
2008-09-01SH4: Remove dyngen leftoversaurel323-16/+1
2008-09-01SH4: final conversion to TCGaurel324-28/+14
2008-09-01SH4: convert floating-point ops to TCGaurel325-420/+421
2008-09-01SH4: Remove most uses of cpu_T[0] and cpu_T[1]aurel321-181/+427
2008-09-01SH4: TCG optimisationsaurel321-349/+236
2008-09-01SH4: Convert remaining non-fp ops to TCGaurel325-153/+130
2008-08-30SH4: Convert shift functions to TCGaurel322-24/+9
2008-08-30SH4: convert control/status register load/store to TCGaurel324-82/+69
2008-08-30SH4: Convert memory loads/stores to TCGaurel322-126/+58
2008-08-30SH4: convert some more arithmetics ops to TCGaurel325-193/+86
2008-08-29SH4: convert a few helpers to TCGaurel324-58/+52
2008-08-29SH4: convert branch/jump instructions to TCGaurel322-118/+54
2008-08-29SH4: convert simple compare instructions to TCGaurel322-87/+53
2008-08-29SH4: convert a few control or system register functions to TCGaurel322-69/+46
2008-08-29SH4: Fix bugs introduce in r5099aurel321-8/+8
2008-08-29SH4: fix xtrct Rm,Rn (broken in r5103)aurel321-1/+1
2008-08-29SH4: convert logic and arithmetic ops to TCGaurel322-317/+111
2008-08-29SH4: use TCG variables for gregsaurel321-200/+202
2008-08-28SH4: use uint32_t/i32 based types/opsaurel321-30/+30
2008-08-28SH4: Convert register moves to TCGaurel322-261/+209
2008-08-28SH4: Convert dyngen registers moves to TCGaurel322-15/+9
2008-08-28SH4: Convert immediate loads to TCGaurel322-16/+4
2008-08-28SH4: remove unused opsaurel321-30/+0
2008-08-28SH4: add support for TCG helpersaurel322-0/+11
2008-08-28SH4: Init TCG variablesaurel321-1/+3
2008-08-22sh4: fix tas.b @Rn instructionaurel322-8/+6
2008-08-22[sh4] code translation bug fixaurel321-4/+18
2008-08-22[sh4] MMU bug fixaurel321-3/+20
2008-08-22[sh4] memory mapped TLB entriesaurel322-11/+113
2008-08-22[sh4] delay slot bug fixaurel322-0/+22
2008-08-22[sh4] sleep instructionaurel325-2/+17
2008-08-17Fix warnings that would be generated by gcc -Wstrict-prototypesblueswir11-1/+1
2008-07-18Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.ths1-6/+5
2008-07-16Fix a bunch of type mismatch-related warnings (Jan Kiszka).balrog1-1/+1
2008-07-16Remove unintended dereference, kills a warning (Jan Kiszka).balrog1-2/+2
2008-07-01Move interrupt_request and user_mode_only to common cpu state.pbrook1-2/+0
2008-06-29Add missing static qualifiers.pbrook1-1/+1
2008-06-29Add instruction counter.pbrook2-0/+36
2008-05-30Fix typo.pbrook1-1/+1
2008-05-30Move clone() register setup to target specific code. Handle fork-like clone.pbrook1-0/+9
2008-05-29Push common interrupt variables to cpu-defs.h (Glauber Costa)bellard1-2/+0
2008-05-28moved halted field to CPU_COMMONbellard1-1/+0
2008-05-25Fix off-by-one unwinding error.pbrook1-5/+0
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