Age | Commit message (Expand) | Author | Files | Lines |
2012-10-05 | target-arm: Drop unused DECODE_CPREG_CRN macro | Peter Maydell | 1 | -2/+0 |
2012-10-05 | target-arm: use deposit instead of hardcoded version | Aurelien Jarno | 1 | -14/+6 |
2012-10-05 | target-arm: mark a few integer helpers const and pure | Aurelien Jarno | 1 | -9/+10 |
2012-10-05 | target-arm: convert sar, shl and shr helpers to TCG | Aurelien Jarno | 3 | -33/+43 |
2012-10-05 | target-arm: convert add_cc and sub_cc helpers to TCG | Aurelien Jarno | 3 | -40/+48 |
2012-10-05 | target-arm: use globals for CC flags | Aurelien Jarno | 1 | -81/+46 |
2012-10-05 | target-arm: Reinstate display of VFP registers in cpu_dump_state | Peter Maydell | 1 | -26/+16 |
2012-09-27 | Emit debug_insn for CPU_LOG_TB_OP_OPT as well. | Richard Henderson | 1 | -1/+1 |
2012-09-15 | target-arm: final conversion to AREG0 free mode | Blue Swirl | 5 | -20/+15 |
2012-09-15 | target-arm: convert remaining helpers | Blue Swirl | 3 | -125/+125 |
2012-09-15 | target-arm: convert void helpers | Blue Swirl | 3 | -18/+18 |
2012-09-10 | target-arm: Fix potential buffer overflow | Stefan Weil | 1 | -2/+2 |
2012-08-22 | arm-semi: don't leak 1KB user string lock buffer upon TARGET_SYS_OPEN | Jim Meyering | 1 | -6/+7 |
2012-08-10 | target-arm: Fix typos in comments | Peter Maydell | 6 | -24/+24 |
2012-08-10 | arm: translate: comment typo - s/middel/middle/ | Peter A. G. Crosthwaite | 1 | -1/+1 |
2012-07-12 | target-arm: Add support for long format translation table walks | Peter Maydell | 1 | -0/+182 |
2012-07-12 | target-arm: Implement TTBCR changes for LPAE | Peter Maydell | 1 | -1/+14 |
2012-07-12 | target-arm: Implement long-descriptor PAR format | Peter Maydell | 1 | -10/+69 |
2012-07-12 | target-arm: Use target_phys_addr_t in get_phys_addr() | Peter Maydell | 1 | -14/+15 |
2012-07-12 | target-arm: Add 64 bit PAR, TTBR0, TTBR1 for LPAE | Peter Maydell | 3 | -3/+87 |
2012-07-12 | target-arm: Add 64 bit variants of DBGDRAR and DBGDSAR for LPAE | Peter Maydell | 1 | -0/+5 |
2012-07-12 | target-arm: Add AMAIR0, AMAIR1 LPAE cp15 registers | Peter Maydell | 1 | -0/+16 |
2012-07-12 | target-arm: Extend feature flags to 64 bits | Peter Maydell | 3 | -6/+6 |
2012-07-12 | target-arm: Implement privileged-execute-never (PXN) | Peter Maydell | 3 | -12/+26 |
2012-07-12 | ARM: Make target_phys_addr_t 64 bits and physaddrs 40 bits | Peter Maydell | 1 | -1/+1 |
2012-07-12 | target-arm: Fix TCG temp handling in 64 bit cp writes | Peter Maydell | 1 | -0/+2 |
2012-07-12 | target-arm: Fix some copy-and-paste errors in cp register names | Peter Maydell | 1 | -3/+3 |
2012-07-12 | target-arm: Fix typo that meant TTBR1 accesses went to TTBR0 | Peter Maydell | 1 | -1/+1 |
2012-07-12 | target-arm: Fix CP15 based WFI | Paul Brook | 1 | -1/+1 |
2012-06-20 | target-arm: Remove ARM_CPUID_* macros | Peter Maydell | 2 | -52/+25 |
2012-06-20 | target-arm: Remove remaining old cp15 infrastructure | Peter Maydell | 3 | -100/+1 |
2012-06-20 | target-arm: Move block cache ops to new cp15 framework | Peter Maydell | 2 | -6/+14 |
2012-06-20 | target-arm: Remove c0_cachetype CPUARMState field | Peter Maydell | 2 | -4/+1 |
2012-06-20 | target-arm: Convert final ID registers | Peter Maydell | 2 | -50/+68 |
2012-06-20 | target-arm: Convert MPIDR | Peter Maydell | 3 | -22/+31 |
2012-06-20 | target-arm: Convert cp15 cache ID registers | Peter Maydell | 3 | -32/+33 |
2012-06-20 | target-arm: Convert cp15 crn=0 crm={1,2} feature registers | Peter Maydell | 3 | -24/+54 |
2012-06-20 | target-arm: Convert cp15 crn=1 registers | Peter Maydell | 3 | -76/+61 |
2012-06-20 | target-arm: Convert cp15 crn=9 registers | Peter Maydell | 2 | -79/+59 |
2012-06-20 | target-arm: Convert cp15 crn=6 registers | Peter Maydell | 2 | -53/+45 |
2012-06-20 | target-arm: convert cp15 crn=7 registers | Peter Maydell | 3 | -11/+74 |
2012-06-20 | target-arm: Convert cp15 VA-PA translation registers | Peter Maydell | 1 | -43/+65 |
2012-06-20 | target-arm: Convert cp15 MMU TLB control | Peter Maydell | 1 | -20/+43 |
2012-06-20 | target-arm: Convert cp15 crn=15 registers | Peter Maydell | 3 | -117/+126 |
2012-06-20 | target-arm: Convert cp15 crn=10 registers | Peter Maydell | 1 | -6/+5 |
2012-06-20 | target-arm: Convert cp15 crn=13 registers | Peter Maydell | 1 | -30/+31 |
2012-06-20 | target-arm: Convert cp15 crn=2 registers | Peter Maydell | 2 | -56/+33 |
2012-06-20 | target-arm: Convert MMU fault status cp15 registers | Peter Maydell | 1 | -81/+107 |
2012-06-20 | target-arm: Convert cp15 c3 register | Peter Maydell | 1 | -6/+12 |
2012-06-20 | target-arm: Convert generic timer cp15 regs | Peter Maydell | 1 | -12/+11 |
2012-06-20 | target-arm: Convert performance monitor registers | Peter Maydell | 3 | -149/+158 |
2012-06-20 | target-arm: Convert TLS registers | Peter Maydell | 2 | -58/+19 |
2012-06-20 | target-arm: Convert WFI/barriers special cases to cp_reginfo | Peter Maydell | 2 | -51/+42 |
2012-06-20 | target-arm: Convert TEECR, TEEHBR to new scheme | Peter Maydell | 3 | -77/+45 |
2012-06-20 | target-arm: Convert debug registers to cp_reginfo | Peter Maydell | 2 | -28/+25 |
2012-06-20 | target-arm: Add register_cp_regs_for_features() | Peter Maydell | 3 | -0/+14 |
2012-06-20 | target-arm: Remove old cpu_arm_set_cp_io infrastructure | Peter Maydell | 4 | -107/+1 |
2012-06-20 | target-arm: initial coprocessor register framework | Peter Maydell | 7 | -3/+546 |
2012-06-20 | target-arm: Fix 11MPCore cache type register value | Peter Maydell | 1 | -1/+1 |
2012-06-07 | build: move other target-*/ objects to nested Makefile.objs | Paolo Bonzini | 1 | -1/+2 |
2012-06-07 | build: move libobj-y variable to nested Makefile.objs | Paolo Bonzini | 1 | -0/+4 |
2012-06-07 | build: move obj-TARGET-y variables to nested Makefile.objs | Paolo Bonzini | 2 | -0/+510 |
2012-06-04 | Kill off cpu_state_reset() | Andreas Färber | 1 | -5/+0 |
2012-06-04 | target-arm: Use cpu_reset() in cpu_arm_init() | Andreas Färber | 1 | -1/+1 |
2012-05-10 | target-arm/cpu.h: Make cpu_init("nonexistent cpu") return NULL | Peter Maydell | 1 | -1/+9 |
2012-05-10 | target-arm: When setting FPSCR.QC, don't clear other FPSCR bits | Matt Craighead | 1 | -1/+1 |
2012-04-27 | target-arm: Make SETEND respect bswap_code (BE8) setting | Peter Maydell | 1 | -4/+4 |
2012-04-27 | target-arm: Move A9 config_base_address reset value to ARMCPU | Peter Maydell | 2 | -3/+2 |
2012-04-27 | target-arm: Change cpu_arm_init() return type to ARMCPU | Andreas Färber | 4 | -7/+7 |
2012-04-21 | target-arm: Move reset handling to arm_cpu_reset | Peter Maydell | 2 | -99/+92 |
2012-04-21 | target-arm: Drop cpu_reset_model_id() | Peter Maydell | 1 | -58/+1 |
2012-04-21 | target-arm: Move cache ID register setup to cpu specific init fns | Peter Maydell | 3 | -11/+18 |
2012-04-21 | target-arm: Move OMAP cp15_i_{max,min} reset to cpu_state_reset | Peter Maydell | 1 | -2/+1 |
2012-04-21 | target-arm: Move feature register setup to per-CPU init fns | Peter Maydell | 3 | -59/+122 |
2012-04-21 | target-arm: Move iWMMXT wCID reset to cpu_state_reset | Peter Maydell | 1 | -1/+4 |
2012-04-21 | target-arm: Drop JTAG_ID documentation | Peter Maydell | 1 | -2/+0 |
2012-04-21 | target-arm: Move SCTLR reset value setup to per cpu init fns | Peter Maydell | 3 | -12/+25 |
2012-04-21 | target-arm: Move CTR setup to per cpu init fns | Peter Maydell | 3 | -12/+24 |
2012-04-21 | target-arm: Move MVFR* setup to per cpu init fns | Peter Maydell | 3 | -12/+18 |
2012-04-21 | target-arm: Move FPSID config to cpu init fns | Peter Maydell | 3 | -8/+12 |
2012-04-21 | target-arm: Move feature bit settings to CPU init fns | Peter Maydell | 4 | -99/+137 |
2012-04-21 | target-arm: Add QOM subclasses for each ARM cpu implementation | Peter Maydell | 3 | -65/+282 |
2012-04-21 | target-arm: remind to keep arm features in sync with linux-user/elfload.c | Benoit Canet | 1 | -0/+4 |
2012-04-14 | Use uintptr_t for various op related functions | Blue Swirl | 1 | -5/+3 |
2012-04-06 | Userspace ARM BE8 support | Paul Brook | 3 | -10/+42 |
2012-03-30 | ARM: Permit any ARMv6K CPU to read the MVFR0 and MVFR1 VFP registers. | Andrew Towers | 3 | -1/+3 |
2012-03-29 | target-arm: Minimalistic CPU QOM'ification | Andreas Färber | 4 | -1/+139 |
2012-03-29 | target-arm: Drop cpu_arm_close() | Andreas Färber | 2 | -6/+0 |
2012-03-15 | target-arm: Decode SETEND correctly in Thumb | Peter Maydell | 1 | -23/+40 |
2012-03-15 | target-arm: Clear IT bits when taking exceptions in v7M | Peter Maydell | 1 | -1/+2 |
2012-03-15 | target-arm: Fix typo in ARM946 cp15 c5 handling | Peter Maydell | 1 | -1/+1 |
2012-03-14 | Rename CPUState -> CPUArchState | Andreas Färber | 1 | -1/+1 |
2012-03-14 | target-arm: Don't overuse CPUState | Andreas Färber | 6 | -195/+195 |
2012-03-14 | Rename cpu_reset() to cpu_state_reset() | Andreas Färber | 1 | -2/+2 |
2012-02-28 | target-arm: Clean includes | Stefan Weil | 1 | -5/+0 |
2012-02-17 | target-arm/helper.c: tb_flush() on CPU reset | Peter Maydell | 1 | -0/+5 |
2012-02-17 | target-arm/helper.c: Correct FPSID value for Cortex-A9 | Peter Maydell | 1 | -1/+1 |
2012-01-25 | Add Cortex-A15 CPU definition | Peter Maydell | 2 | -5/+52 |
2012-01-25 | Add dummy implementation of generic timer cp15 registers | Peter Maydell | 2 | -2/+11 |
2012-01-25 | arm: store the config_base_register during cpu_reset | Mark Langsdorf | 1 | -0/+3 |
2012-01-25 | target-arm/helper.c: Don't assume softfloat int32 is 32 bits only | Peter Maydell | 1 | -1/+1 |
2012-01-25 | target-arm: Fix implementation of TLB invalidate operations | Peter Maydell | 1 | -7/+6 |
2012-01-13 | arm: Add dummy support for co-processor 15's secure config register | Rob Herring | 3 | -1/+13 |
2012-01-13 | target-arm: Fix errors in decode of M profile CPS | Peter Maydell | 1 | -4/+4 |
2012-01-05 | arm: add dummy A9-specific cp15 registers | Mark Langsdorf | 3 | -1/+59 |
2012-01-05 | target-arm: Ignore attempts to set invalid modes in CPSR | Peter Maydell | 1 | -1/+29 |
2012-01-05 | target-arm: Don't use cpu_single_env in bank_number() | Peter Maydell | 1 | -6/+6 |
2011-12-13 | target-arm: Infer VFPv3 feature from VFPv4 | Andreas Färber | 1 | -1/+3 |
2011-12-13 | target-arm: Infer VFP feature from VFPv3 | Andreas Färber | 1 | -3/+3 |
2011-12-13 | target-arm: Infer Thumb division feature from M profile | Andreas Färber | 1 | -1/+3 |
2011-12-13 | target-arm: Infer Thumb2 feature from ARMv7 | Andreas Färber | 1 | -4/+1 |
2011-12-13 | target-arm: Infer AUXCR feature from ARMv6 | Andreas Färber | 1 | -5/+3 |
2011-12-13 | target-arm: Infer ARMv6(K) feature from ARMv7 | Andreas Färber | 1 | -4/+5 |
2011-12-13 | target-arm: Infer ARMv6 feature from v6K | Andreas Färber | 1 | -5/+3 |
2011-12-13 | target-arm: Infer ARMv5 feature from ARMv6 | Andreas Färber | 1 | -7/+3 |
2011-12-13 | target-arm: Infer ARMv4T feature from ARMv5 | Andreas Färber | 1 | -12/+3 |
2011-12-13 | arm: Fix CP15 FSR (C5) domain setting | Jean-Christophe DUBOIS | 1 | -11/+15 |
2011-12-05 | target-arm/helper.c: Don't allocate TCG resources unless TCG enabled | Peter Maydell | 1 | -1/+1 |
2011-12-05 | target-arm/translate.c: Fix slightly misleading comment in Thumb decoder | Peter Maydell | 1 | -3/+5 |
2011-10-20 | target-arm: Fix use of free() in cpu_arm_close() | Andreas Färber | 1 | -1/+1 |
2011-10-19 | target-arm/machine.c: Restore VFP registers correctly | Dmitry Koshelev | 1 | -1/+1 |
2011-10-19 | target-arm: Implement VFPv4 fused multiply-accumulate insns | Peter Maydell | 4 | -0/+90 |
2011-10-19 | target-arm: Add ARM UDIV/SDIV support | Peter Maydell | 3 | -1/+24 |
2011-10-19 | target-arm: Rename ARM_FEATURE_DIV to _THUMB_DIV | Peter Maydell | 3 | -4/+5 |
2011-10-19 | target-arm: v6 media multiply space: UNDEF on unassigned encodings | Peter Maydell | 1 | -4/+20 |
2011-10-19 | rsqrte_f32: No need to copy sign bit. | Christophe LYON | 1 | -2/+1 |
2011-10-10 | Merge remote-tracking branch 'stefanha/trivial-patches' into staging | Anthony Liguori | 1 | -1/+1 |
2011-10-08 | ARM: fix segfault | Blue Swirl | 1 | -0/+1 |
2011-10-05 | target-arm: Fix typo | Andreas Färber | 1 | -1/+1 |
2011-10-01 | softmmu_header: pass CPUState to tlb_fill | Blue Swirl | 1 | -4/+2 |
2011-08-20 | Use glib memory allocation and free functions | Anthony Liguori | 1 | -1/+1 |
2011-08-09 | Merge remote-tracking branch 'pm-arm/for-upstream' into pm | Edgar E. Iglesias | 3 | -42/+121 |
2011-08-07 | Remove unused is_softmmu parameter from cpu_handle_mmu_fault | Blue Swirl | 3 | -4/+4 |
2011-07-30 | exec.h cleanup | Blue Swirl | 2 | -32/+7 |
2011-07-26 | target-arm: Don't print debug messages for various UNDEF cases | Peter Maydell | 1 | -6/+0 |
2011-07-26 | target-arm: UNDEF on a VCVTT/VCVTB UNPREDICTABLE to avoid TCG assert | Peter Maydell | 1 | -8/+11 |
2011-07-26 | target-arm: Handle UNDEF and UNPREDICTABLE cases for VLDM, VSTM | Peter Maydell | 1 | -7/+31 |
2011-07-26 | target-arm: Support v6 barriers in linux-user mode | Peter Maydell | 1 | -18/+33 |
2011-07-26 | target-arm: Mark 1136r1 as a v6K core | Peter Maydell | 2 | -2/+21 |
2011-07-26 | target-arm: support for ARM1176JZF-s cores | Jamie Iles | 2 | -0/+24 |
2011-07-26 | target-arm: make VMSAv7 remapping and AP dependent on V6K | Jamie Iles | 1 | -1/+1 |
2011-07-23 | Correct spelling of licensed | Matthew Fernandez | 2 | -2/+2 |
2011-07-20 | Merge branch 'for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm | Blue Swirl | 7 | -492/+752 |
2011-07-04 | arm: Add const attribute to some arm_boot_info pointers | Stefan Weil | 1 | -1/+1 |
2011-06-26 | Remove exec-all.h include directives | Blue Swirl | 3 | -3/+0 |
2011-06-26 | Move cpu_has_work and cpu_pc_from_tb to cpu.h | Blue Swirl | 2 | -12/+13 |
2011-06-26 | exec.h: fix coding style and change cpu_has_work to return bool | Blue Swirl | 1 | -3/+3 |
2011-06-26 | cpu_loop_exit: avoid using AREG0 | Blue Swirl | 1 | -3/+3 |
2011-06-22 | target-arm: Fix BASEPRI, BASEPRI_MAX, and FAULTMASK access | Sebastian Huber | 1 | -12/+12 |
2011-06-22 | target-arm: Minimal implementation of performance counters | Peter Maydell | 4 | -16/+183 |
2011-06-22 | Revert "target-arm: Use global env in neon_helper.c helpers" | Peter Maydell | 3 | -191/+227 |
2011-06-22 | target-arm: Pass fp status pointer explicitly to neon fp helpers | Peter Maydell | 3 | -74/+113 |
2011-06-22 | target-arm: Make VFP binop helpers take pointer to fpstatus, not CPUState | Peter Maydell | 3 | -18/+25 |
2011-06-22 | target-arm: Add helper function to generate code to get fpstatus pointer | Peter Maydell | 1 | -24/+16 |
2011-06-22 | Revert "target-arm: Use global env in iwmmxt_helper.c helpers" | Peter Maydell | 3 | -156/+175 |
2011-06-03 | target-arm: BKPT instructions should raise prefetch aborts with IFSR type 00010 | Alex Zuepke | 1 | -0/+1 |
2011-06-03 | target-arm: Fix compilation failure for 64 bit hosts | Peter Maydell | 1 | -9/+9 |
2011-05-23 | target-arm/exec.h: Remove unused #define of M0 | Peter Maydell | 1 | -2/+0 |
2011-05-23 | target-arm: Signal InvalidOp for Neon GE and GT compares of QNaN | Peter Maydell | 1 | -22/+18 |
2011-05-23 | target-arm: Use correct float status for Neon int-float conversions | Peter Maydell | 3 | -194/+146 |
2011-05-23 | target-arm: Signal Underflow when denormal flushed to zero on output | Peter Maydell | 1 | -1/+1 |
2011-05-23 | target-arm: Signal InputDenormal for VRECPE, VRSQRTE, VRECPS, VRSQRTS | Peter Maydell | 1 | -0/+12 |
2011-05-23 | target-arm: Don't set FP exceptions in recip, recip_sqrt estimate fns | Peter Maydell | 1 | -2/+10 |
2011-05-15 | target-arm: Fix VMLA, VMLS, VNMLS, VNMLA handling of NaNs | Peter Maydell | 1 | -13/+40 |
2011-05-12 | Merge remote-tracking branch 'stefanha/trivial-patches' into staging | Anthony Liguori | 1 | -5/+5 |
2011-05-08 | target-arm: Privatize CPU_INTERRUPT_FIQ. | Richard Henderson | 1 | -0/+4 |
2011-05-08 | Fix typos in comments and code (occured -> occurred and related) | Stefan Weil | 1 | -3/+3 |
2011-05-08 | Fix typos in comments (neccessary -> necessary) | Stefan Weil | 1 | -2/+2 |
2011-04-27 | target-arm: Don't update base register on abort in Thumb T1 LDM | Peter Maydell | 1 | -3/+14 |
2011-04-27 | target-arm: fix LDMIA bug on page boundary | YuYeon Oh | 1 | -1/+9 |
2011-04-25 | target-arm: Handle UNDEF cases for Neon VLD/VST multiple-structures | Peter Maydell | 1 | -0/+15 |
2011-04-25 | target-arm: Handle UNDEFs for Neon single element load/stores | Peter Maydell | 1 | -0/+34 |
2011-04-20 | target-arm: Set Invalid flag for NaN in float-to-int conversions | Peter Maydell | 1 | -0/+9 |
2011-04-20 | Implement basic part of SA-1110/SA-1100 | Dmitry Eremin-Solenikov | 2 | -0/+12 |
2011-04-20 | Remove unused function parameter from cpu_restore_state | Stefan Weil | 1 | -1/+1 |
2011-04-20 | Remove unused function parameters from gen_pc_load and rename the function | Stefan Weil | 1 | -4/+3 |
2011-04-17 | move helpers.h to helper.h | Lluís | 6 | -7/+7 |
2011-04-16 | Fix some typos in comments and documentation | Stefan Weil | 1 | -1/+1 |
2011-04-13 | target-arm: Don't overflow when calculating value for signed VABAL | Peter Maydell | 1 | -17/+21 |
2011-04-12 | target-arm: Detect tininess before rounding for FP operations | Peter Maydell | 1 | -0/+4 |
2011-04-12 | target-arm: Handle UNDEF cases for VDUP (scalar) | Juha Riihimäki | 1 | -0/+3 |
2011-04-12 | target-arm: Treat UNPREDICTABLE VTBL, VTBX case as UNDEF | Peter Maydell | 1 | -1/+8 |
2011-04-12 | target-arm: Handle UNDEF cases for Neon 2 register misc forms | Peter Maydell | 1 | -5/+16 |
2011-04-12 | target-arm: Simplify checking of size field in Neon 2reg-misc forms | Peter Maydell | 1 | -76/+179 |
2011-04-12 | target-arm: Handle UNDEF cases for VEXT | Peter Maydell | 1 | -0/+4 |
2011-04-12 | target-arm: Handle UNDEF cases for Neon 2 regs + scalar forms | Peter Maydell | 1 | -10/+27 |
2011-04-12 | target-arm: Handle UNDEF cases for Neon 3-regs-different-widths | Peter Maydell | 1 | -20/+36 |
2011-04-12 | target-arm: Handle UNDEF cases for Neon invalid modified-immediates | Peter Maydell | 1 | -0/+10 |
2011-04-12 | target-arm: Collapse VSRI case into VSHL, VSLI | Peter Maydell | 1 | -4/+0 |
2011-04-12 | target-arm: Handle UNDEF cases for Neon "2 regs and shift" insns | Peter Maydell | 1 | -19/+22 |
2011-04-12 | target-arm: Simplify three-register pairwise code | Juha Riihimäki | 1 | -11/+8 |
2011-04-12 | target-arm: Handle UNDEF cases for Neon 3-regs-same insns | Peter Maydell | 1 | -11/+43 |
2011-04-12 | target-arm: Use lookup table for size check on Neon 3-reg-same insns | Peter Maydell | 1 | -64/+133 |
2011-04-10 | arm: basic support for ARMv4/ARMv4T emulation | Dmitry Eremin-Solenikov | 3 | -12/+80 |
2011-04-10 | Fix conversions from pointer to tcg_target_long | Stefan Weil | 1 | -1/+1 |
2011-04-04 | target-arm: Make Neon helper routines use correct FP status | Peter Maydell | 1 | -2/+1 |
2011-04-04 | target-arm: Use global env in iwmmxt_helper.c helpers | Peter Maydell | 3 | -175/+156 |
2011-04-04 | target-arm: Use global env in neon_helper.c helpers | Peter Maydell | 3 | -206/+191 |
2011-04-03 | target-arm/helper.c: For float-int conversion helpers pass ints as ints | Peter Maydell | 2 | -130/+85 |
2011-04-03 | target-arm: Use new softfloat min/max functions for VMAX, VMIN | Peter Maydell | 1 | -6/+2 |