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authorAlexey Kardashevskiy <aik@amd.com>2024-02-26 17:01:35 +1100
committerMartin Mares <mj@ucw.cz>2024-02-26 10:08:51 +0100
commit651a352a037b7a7b4d8e0bcb3eefb7cfc07fdda7 (patch)
treeb650d1c5e56220339cf70208f08c20c75ed3d941
parent42fc4263ec0e35ba6a5ac7c32956e25b4551c907 (diff)
downloadpciutils-651a352a037b7a7b4d8e0bcb3eefb7cfc07fdda7.tar.gz
lspci: Add TEE-IO extended capability bit
PCIe r6.1, sec 7.5.3.3 defines "TEE-IO Supported" in the PCI Express Device Capabilities Register which indicates that the function implements the TEE-IO functionality as described by the TEE Device Interface Security Protocol (TDISP, PCIe r6.1, chapter 11). tests/cap-ide is an example of such device. Signed-off-by: Alexey Kardashevskiy <aik@amd.com>
-rw-r--r--lib/header.h1
-rw-r--r--ls-caps.c1
2 files changed, 2 insertions, 0 deletions
diff --git a/lib/header.h b/lib/header.h
index 68cb3c1..0b0ed9a 100644
--- a/lib/header.h
+++ b/lib/header.h
@@ -777,6 +777,7 @@
#define PCI_EXP_DEVCAP_PWR_VAL 0x3fc0000 /* Slot Power Limit Value */
#define PCI_EXP_DEVCAP_PWR_SCL 0xc000000 /* Slot Power Limit Scale */
#define PCI_EXP_DEVCAP_FLRESET 0x10000000 /* Function-Level Reset */
+#define PCI_EXP_DEVCAP_TEE_IO 0x40000000 /* TEE-IO Supported (TDISP) */
#define PCI_EXP_DEVCTL 0x8 /* Device Control */
#define PCI_EXP_DEVCTL_CERE 0x0001 /* Correctable Error Reporting En. */
#define PCI_EXP_DEVCTL_NFERE 0x0002 /* Non-Fatal Error Reporting Enable */
diff --git a/ls-caps.c b/ls-caps.c
index 2c99812..65e92e6 100644
--- a/ls-caps.c
+++ b/ls-caps.c
@@ -717,6 +717,7 @@ static void cap_express_dev(struct device *d, int where, int type)
printf(" SlotPowerLimit ");
show_power_limit((t & PCI_EXP_DEVCAP_PWR_VAL) >> 18, (t & PCI_EXP_DEVCAP_PWR_SCL) >> 26);
}
+ printf(" TEE-IO%c", FLAG(t, PCI_EXP_DEVCAP_TEE_IO));
printf("\n");
w = get_conf_word(d, where + PCI_EXP_DEVCTL);