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author | Wilfred Mallawa <wilfred.mallawa@wdc.com> | 2023-07-18 18:50:28 +1000 |
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committer | Wilfred Mallawa <wilfred.mallawa@wdc.com> | 2023-07-18 18:57:38 +1000 |
commit | 2e05a86bf0c9d3d383f93517581395a1d2f17b6f (patch) | |
tree | 078adcfe8875397d233a29f120edea0144fcc848 | |
parent | 6182921907ef3cc31be3394eb468b24bcd3955a8 (diff) | |
download | pciutils-2e05a86bf0c9d3d383f93517581395a1d2f17b6f.tar.gz |
lib: fixup DOE status register bit
The error bit is specified by the 2nd (zero indexed) bit
in the status register, so the respective bit value is 4 (PCI Base Spec
6.0.1). Let's fix that up.
Signed-off-by: Wilfred Mallawa <wilfred.mallawa@wdc.com>
-rw-r--r-- | lib/header.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/header.h b/lib/header.h index e146a56..5ab606f 100644 --- a/lib/header.h +++ b/lib/header.h @@ -1391,7 +1391,7 @@ #define PCI_DOE_STS 0xC /* DOE Status Register */ #define PCI_DOE_STS_BUSY 0x1 /* DOE Busy */ #define PCI_DOE_STS_INT 0x2 /* DOE Interrupt Status */ -#define PCI_DOE_STS_ERROR 0x3 /* DOE Error */ +#define PCI_DOE_STS_ERROR 0x4 /* DOE Error */ #define PCI_DOE_STS_OBJECT_READY 0x80000000 /* Data Object Ready */ /* |