Don't let missing DDR2 SPD revision or PLL relock time break side-by-side output.

git-svn-id: http://lm-sensors.org/svn/i2c-tools/trunk@6075 7894878c-1315-0410-8ee3-d5d059ff63e0

2 files changed, 4 insertions, 6 deletions

diff --git a/CHANGES b/CHANGES
index 537d749..574438e 100644
--- a/CHANGES
+++ b/CHANGES
@@ -7,7 +7,7 @@ SVN HEAD
                 Decode bus width extension of DDR3 SDRAM
                 Don't choke when no EEPROM is found
                 Don't make columns larger than they need to be
-                Don't let missing DDR module height break side-by-side output
+                Make side-by-side output more robust
                 Print module organization of DDR SDRAM
   i2cdetect: Do a best effort detection if functionality is missing
   i2c-dev.h: Minimize differences with kernel flavor
diff --git a/eeprom/decode-dimms b/eeprom/decode-dimms
index 67506dd..706a73d 100755
--- a/eeprom/decode-dimms
+++ b/eeprom/decode-dimms
@@ -1021,10 +1021,8 @@ sub decode_ddr2_sdram($)
 	my $ctime;
 
 # SPD revision
-	if ($bytes->[62] != 0xff) {
-		printl("SPD Revision", ($bytes->[62] >> 4) . "." .
-				       ($bytes->[62] & 0xf));
-	}
+	printl_cond($bytes->[62] != 0xff, "SPD Revision",
+		    ($bytes->[62] >> 4) . "." . ($bytes->[62] & 0xf));
 
 # speed
 	prints("Memory Characteristics");
@@ -1161,7 +1159,7 @@ sub decode_ddr2_sdram($)
 				    ($bytes->[40] >> 1) & 7)));
 	printl("Maximum DQS to DQ Skew (tDQSQ)", tns($bytes->[44]/100));
 	printl("Maximum Read Data Hold Skew (tQHS)", tns($bytes->[45]/100));
-	printl("PLL Relock Time", $bytes->[46] . " us") if ($bytes->[46]);
+	printl_cond($bytes->[46], "PLL Relock Time", $bytes->[46] . " us");
 }
 
 # Parameter: EEPROM bytes 0-127 (using 3-76)