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| author | Greg Kroah-Hartman <gregkh@suse.de> | 2011-08-30 15:45:03 -0700 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@suse.de> | 2011-08-30 15:45:03 -0700 |
| commit | 5f40599da96e94944b12354dcd30f5ae47e50b84 (patch) | |
| tree | 5ad954091ecd88e6569321669f64843ff943fb4b | |
| parent | 82488756573f5089955d605d3b1eb76d75a6f61b (diff) | |
| download | stable-queue-5f40599da96e94944b12354dcd30f5ae47e50b84.tar.gz | |
3.0 patches
| -rw-r--r-- | queue-3.0/series | 1 | ||||
| -rw-r--r-- | queue-3.0/sparc64-only-panther-cheetah-chips-have-popc.patch | 35 |
2 files changed, 36 insertions, 0 deletions
diff --git a/queue-3.0/series b/queue-3.0/series index 1c0a3610e8..0021890e36 100644 --- a/queue-3.0/series +++ b/queue-3.0/series @@ -44,3 +44,4 @@ sparc64-set-have_c_recordmcount.patch sparc-fix-array-bounds-error-setting-up-pcic-nmi-trap.patch sparc32-sun4d-change-ipi-irq-level-to-prevent-collision.patch regulator-tps65910-add-missing-breaks-in-switch-case.patch +sparc64-only-panther-cheetah-chips-have-popc.patch diff --git a/queue-3.0/sparc64-only-panther-cheetah-chips-have-popc.patch b/queue-3.0/sparc64-only-panther-cheetah-chips-have-popc.patch new file mode 100644 index 0000000000..06f21b2258 --- /dev/null +++ b/queue-3.0/sparc64-only-panther-cheetah-chips-have-popc.patch @@ -0,0 +1,35 @@ +From 1a8e0da5937a6c87807083baa318cf8f98dac9aa Mon Sep 17 00:00:00 2001 +From: "David S. Miller" <davem@davemloft.net> +Date: Mon, 29 Aug 2011 21:14:29 -0700 +Subject: sparc64: Only Panther cheetah+ chips have POPC. + +From: "David S. Miller" <davem@davemloft.net> + +commit 1a8e0da5937a6c87807083baa318cf8f98dac9aa upstream. + +Signed-off-by: David S. Miller <davem@davemloft.net> +Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + +--- + arch/sparc/kernel/setup_64.c | 10 ++++++++-- + 1 file changed, 8 insertions(+), 2 deletions(-) + +--- a/arch/sparc/kernel/setup_64.c ++++ b/arch/sparc/kernel/setup_64.c +@@ -440,8 +440,14 @@ static void __init init_sparc64_elf_hwca + cap |= AV_SPARC_VIS; + if (tlb_type == cheetah || tlb_type == cheetah_plus) + cap |= AV_SPARC_VIS | AV_SPARC_VIS2; +- if (tlb_type == cheetah_plus) +- cap |= AV_SPARC_POPC; ++ if (tlb_type == cheetah_plus) { ++ unsigned long impl, ver; ++ ++ __asm__ __volatile__("rdpr %%ver, %0" : "=r" (ver)); ++ impl = ((ver >> 32) & 0xffff); ++ if (impl == PANTHER_IMPL) ++ cap |= AV_SPARC_POPC; ++ } + if (tlb_type == hypervisor) { + if (sun4v_chip_type == SUN4V_CHIP_NIAGARA1) + cap |= AV_SPARC_ASI_BLK_INIT; |