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authorLinus Torvalds <torvalds@linux-foundation.org>2023-07-06 09:56:53 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2023-07-06 09:56:53 -0700
commit9f57c13f7ed70a94ecc135645bc764efdd378acd (patch)
treeeb1f4b7c9fbfd228c38d00e42914f1871371e0bd
parent0b907305022beb1a4cf5b9f6d776483a2356c841 (diff)
parent6722e46513e0af8e2fff4698f7cb78bc50a9f13f (diff)
downloadlinux-pm-9f57c13f7ed70a94ecc135645bc764efdd378acd.tar.gz
Merge tag 'soc-fixes-6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC fixes from Arnd Bergmann: "There are three small fixes that came up sincie the past week: - an incorrect bit offset in ixp4xx bus driver - a riscv randconfig regression in the thead platform I merged - whitespace fixes for some dts files" * tag 'soc-fixes-6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: bus: ixp4xx: fix IXP4XX_EXP_T1_MASK ARM: dts: st: add missing space before { RISC-V: make ARCH_THEAD preclude XIP_KERNEL
-rw-r--r--arch/arm/boot/dts/st/spear1310.dtsi2
-rw-r--r--arch/arm/boot/dts/st/spear1340.dtsi2
-rw-r--r--arch/arm/boot/dts/st/stih407-family.dtsi2
-rw-r--r--arch/arm/boot/dts/st/stih407-pinctrl.dtsi10
-rw-r--r--arch/arm/boot/dts/st/stm32f429-disco.dts2
-rw-r--r--arch/arm/boot/dts/st/stm32f746-pinctrl.dtsi2
-rw-r--r--arch/arm/boot/dts/st/stm32f769-pinctrl.dtsi2
-rw-r--r--arch/arm/boot/dts/st/stm32h7-pinctrl.dtsi6
-rw-r--r--arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi4
-rw-r--r--arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1.dtsi6
-rw-r--r--arch/arm/boot/dts/st/stm32mp157a-microgea-stm32mp1.dtsi6
-rw-r--r--arch/riscv/Kconfig.socs1
-rw-r--r--drivers/bus/intel-ixp4xx-eb.c2
13 files changed, 24 insertions, 23 deletions
diff --git a/arch/arm/boot/dts/st/spear1310.dtsi b/arch/arm/boot/dts/st/spear1310.dtsi
index 2f746a9428a76..ba827d60bf075 100644
--- a/arch/arm/boot/dts/st/spear1310.dtsi
+++ b/arch/arm/boot/dts/st/spear1310.dtsi
@@ -11,7 +11,7 @@
compatible = "st,spear1310";
ahb {
- spics: spics@e0700000{
+ spics: spics@e0700000 {
compatible = "st,spear-spics-gpio";
reg = <0xe0700000 0x1000>;
st-spics,peripcfg-reg = <0x3b0>;
diff --git a/arch/arm/boot/dts/st/spear1340.dtsi b/arch/arm/boot/dts/st/spear1340.dtsi
index 818886e117138..d54e10629a7d7 100644
--- a/arch/arm/boot/dts/st/spear1340.dtsi
+++ b/arch/arm/boot/dts/st/spear1340.dtsi
@@ -12,7 +12,7 @@
ahb {
- spics: spics@e0700000{
+ spics: spics@e0700000 {
compatible = "st,spear-spics-gpio";
reg = <0xe0700000 0x1000>;
st-spics,peripcfg-reg = <0x42c>;
diff --git a/arch/arm/boot/dts/st/stih407-family.dtsi b/arch/arm/boot/dts/st/stih407-family.dtsi
index 5ebb77947fd91..3f58383a7b592 100644
--- a/arch/arm/boot/dts/st/stih407-family.dtsi
+++ b/arch/arm/boot/dts/st/stih407-family.dtsi
@@ -645,7 +645,7 @@
st,lpc-mode = <ST_LPC_MODE_CLKSRC>;
};
- spifsm: spifsm@9022000{
+ spifsm: spifsm@9022000 {
compatible = "st,spi-fsm";
reg = <0x9022000 0x1000>;
reg-names = "spi-fsm";
diff --git a/arch/arm/boot/dts/st/stih407-pinctrl.dtsi b/arch/arm/boot/dts/st/stih407-pinctrl.dtsi
index 2cf335714ca21..7815669fe8134 100644
--- a/arch/arm/boot/dts/st/stih407-pinctrl.dtsi
+++ b/arch/arm/boot/dts/st/stih407-pinctrl.dtsi
@@ -1090,7 +1090,7 @@
};
i2s_out {
- pinctrl_i2s_8ch_out: i2s_8ch_out{
+ pinctrl_i2s_8ch_out: i2s_8ch_out {
st,pins {
mclk = <&pio33 5 ALT1 OUT>;
lrclk = <&pio33 7 ALT1 OUT>;
@@ -1102,7 +1102,7 @@
};
};
- pinctrl_i2s_2ch_out: i2s_2ch_out{
+ pinctrl_i2s_2ch_out: i2s_2ch_out {
st,pins {
mclk = <&pio33 5 ALT1 OUT>;
lrclk = <&pio33 7 ALT1 OUT>;
@@ -1113,7 +1113,7 @@
};
i2s_in {
- pinctrl_i2s_8ch_in: i2s_8ch_in{
+ pinctrl_i2s_8ch_in: i2s_8ch_in {
st,pins {
mclk = <&pio32 5 ALT1 IN>;
lrclk = <&pio32 7 ALT1 IN>;
@@ -1126,7 +1126,7 @@
};
};
- pinctrl_i2s_2ch_in: i2s_2ch_in{
+ pinctrl_i2s_2ch_in: i2s_2ch_in {
st,pins {
mclk = <&pio32 5 ALT1 IN>;
lrclk = <&pio32 7 ALT1 IN>;
@@ -1137,7 +1137,7 @@
};
spdif_out {
- pinctrl_spdif_out: spdif_out{
+ pinctrl_spdif_out: spdif_out {
st,pins {
spdif_out = <&pio34 7 ALT1 OUT>;
};
diff --git a/arch/arm/boot/dts/st/stm32f429-disco.dts b/arch/arm/boot/dts/st/stm32f429-disco.dts
index 3b81228d46a20..a3cb4aabdd5ad 100644
--- a/arch/arm/boot/dts/st/stm32f429-disco.dts
+++ b/arch/arm/boot/dts/st/stm32f429-disco.dts
@@ -190,7 +190,7 @@
status = "okay";
};
- display: display@1{
+ display: display@1 {
/* Connect panel-ilitek-9341 to ltdc */
compatible = "st,sf-tc240t-9370-t", "ilitek,ili9341";
reg = <1>;
diff --git a/arch/arm/boot/dts/st/stm32f746-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32f746-pinctrl.dtsi
index fcfd2ac7239bb..781197ef42d6b 100644
--- a/arch/arm/boot/dts/st/stm32f746-pinctrl.dtsi
+++ b/arch/arm/boot/dts/st/stm32f746-pinctrl.dtsi
@@ -6,6 +6,6 @@
#include "stm32f7-pinctrl.dtsi"
-&pinctrl{
+&pinctrl {
compatible = "st,stm32f746-pinctrl";
};
diff --git a/arch/arm/boot/dts/st/stm32f769-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32f769-pinctrl.dtsi
index 31005dd9929c4..c26abc04e2cec 100644
--- a/arch/arm/boot/dts/st/stm32f769-pinctrl.dtsi
+++ b/arch/arm/boot/dts/st/stm32f769-pinctrl.dtsi
@@ -6,6 +6,6 @@
#include "stm32f7-pinctrl.dtsi"
-&pinctrl{
+&pinctrl {
compatible = "st,stm32f769-pinctrl";
};
diff --git a/arch/arm/boot/dts/st/stm32h7-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32h7-pinctrl.dtsi
index aa1bc3e10a49d..7f1d234e10245 100644
--- a/arch/arm/boot/dts/st/stm32h7-pinctrl.dtsi
+++ b/arch/arm/boot/dts/st/stm32h7-pinctrl.dtsi
@@ -94,7 +94,7 @@
drive-push-pull;
bias-disable;
};
- pins2{
+ pins2 {
pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
slew-rate = <3>;
drive-open-drain;
@@ -122,7 +122,7 @@
drive-push-pull;
bias-pull-up;
};
- pins2{
+ pins2 {
pinmux = <STM32_PINMUX('B', 8, AF7)>; /* SDMMC1_CKIN */
bias-pull-up;
};
@@ -162,7 +162,7 @@
drive-push-pull;
bias-disable;
};
- pins2{
+ pins2 {
pinmux = <STM32_PINMUX('D', 7, AF11)>; /* SDMMC1_CMD */
slew-rate = <3>;
drive-open-drain;
diff --git a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi
index 06e969aa5fdb9..05c9c4f8064c6 100644
--- a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi
@@ -1659,7 +1659,7 @@
drive-push-pull;
bias-pull-up;
};
- pins2{
+ pins2 {
pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
bias-pull-up;
};
@@ -1694,7 +1694,7 @@
drive-push-pull;
bias-pull-up;
};
- pins2{
+ pins2 {
pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
bias-pull-up;
};
diff --git a/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1.dtsi b/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1.dtsi
index 9de893101b409..569a7e940ecc8 100644
--- a/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1.dtsi
@@ -165,12 +165,12 @@
status = "okay";
};
-&iwdg2{
+&iwdg2 {
timeout-sec = <32>;
status = "okay";
};
-&m4_rproc{
+&m4_rproc {
memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
<&vdev0vring1>, <&vdev0buffer>;
mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
@@ -184,7 +184,7 @@
status = "okay";
};
-&rtc{
+&rtc {
status = "okay";
};
diff --git a/arch/arm/boot/dts/st/stm32mp157a-microgea-stm32mp1.dtsi b/arch/arm/boot/dts/st/stm32mp157a-microgea-stm32mp1.dtsi
index fb4600a598698..a75f50cf71234 100644
--- a/arch/arm/boot/dts/st/stm32mp157a-microgea-stm32mp1.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp157a-microgea-stm32mp1.dtsi
@@ -117,12 +117,12 @@
status = "okay";
};
-&iwdg2{
+&iwdg2 {
timeout-sec = <32>;
status = "okay";
};
-&m4_rproc{
+&m4_rproc {
memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
<&vdev0vring1>, <&vdev0buffer>;
mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
@@ -136,7 +136,7 @@
status = "okay";
};
-&rtc{
+&rtc {
status = "okay";
};
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index ce10a38dff376..6833d01e2e707 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -43,6 +43,7 @@ config ARCH_SUNXI
config ARCH_THEAD
bool "T-HEAD RISC-V SoCs"
+ depends on MMU && !XIP_KERNEL
select ERRATA_THEAD
help
This enables support for the RISC-V based T-HEAD SoCs.
diff --git a/drivers/bus/intel-ixp4xx-eb.c b/drivers/bus/intel-ixp4xx-eb.c
index f5ba6bee6fd8b..320cf307db054 100644
--- a/drivers/bus/intel-ixp4xx-eb.c
+++ b/drivers/bus/intel-ixp4xx-eb.c
@@ -33,7 +33,7 @@
#define IXP4XX_EXP_TIMING_STRIDE 0x04
#define IXP4XX_EXP_CS_EN BIT(31)
#define IXP456_EXP_PAR_EN BIT(30) /* Only on IXP45x and IXP46x */
-#define IXP4XX_EXP_T1_MASK GENMASK(28, 27)
+#define IXP4XX_EXP_T1_MASK GENMASK(29, 28)
#define IXP4XX_EXP_T1_SHIFT 28
#define IXP4XX_EXP_T2_MASK GENMASK(27, 26)
#define IXP4XX_EXP_T2_SHIFT 26