| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2024-05-04 | clk: rockchip: rk3568: Add PLL rate for 724 MHz | Lucas Stach | 1 | -0/+1 |
| 2024-05-04 | clk: rockchip: Remove an unused field in struct rockchip_mmc_clock | Christophe JAILLET | 1 | -1/+0 |
| 2024-04-10 | clk: rockchip: rk3588: Add reset line for HDMI Receiver | Shreeya Patel | 1 | -0/+1 |
| 2024-04-10 | clk: rockchip: rk3568: Add missing USB480M_PHY mux | David Jander | 1 | -0/+4 |
| 2024-02-27 | clk: rockchip: rk3399: Allow to set rate of clk_i2s0_frac's parent | Ondrej Jirman | 1 | -3/+3 |
| 2024-02-27 | clk: rockchip: rk3588: use linked clock ID for GATE_LINK | Sebastian Reichel | 1 | -23/+23 |
| 2024-02-27 | clk: rockchip: rk3588: fix indent | Sebastian Reichel | 1 | -1/+1 |
| 2024-02-27 | clk: rockchip: rk3588: fix pclk_vo0grf and pclk_vo1grf | Sebastian Reichel | 1 | -6/+4 |
| 2024-02-27 | Merge branch 'v6.9-shared/clkids' into v6.9-clk/next | Heiko Stuebner | 3 | -1/+23 |
| 2024-02-27 | clk: rockchip: rk3588: fix CLK_NR_CLKS usage | Sebastian Reichel | 3 | -1/+23 |
| 2024-01-25 | clk: rockchip: rk3568: Add PLL rate for 128MHz | Chris Morgan | 1 | -0/+1 |
| 2024-01-12 | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl... | Linus Torvalds | 1 | -0/+3 |
| 2023-12-05 | clk: rockchip: rk3568: Mark pclk_usb as critical | Chris Morgan | 1 | -0/+1 |
| 2023-12-05 | clk: rockchip: rk3568: Add PLL rate for 126.4MHz | Chris Morgan | 1 | -0/+1 |
| 2023-11-28 | clk: rockchip: rk3128: Fix SCLK_SDMMC's clock name | Alex Bee | 1 | -1/+1 |
| 2023-11-28 | clk: rockchip: rk3128: Fix aclk_peri_src's parent | Finley Xiao | 1 | -13/+7 |
| 2023-11-16 | clk: rockchip: rk3128: Fix HCLK_OTG gate register | Weihao Li | 1 | -1/+1 |
| 2023-11-16 | clk: rockchip: rk3568: Add PLL rate for 292.5MHz | Chris Morgan | 1 | -0/+1 |
| 2023-11-16 | clk: rockchip: rk3568: Add PLL rate for 115.2MHz | Chris Morgan | 1 | -0/+1 |
| 2023-10-23 | clk: Use device_get_match_data() | Rob Herring | 1 | -7/+2 |
| 2023-08-30 | Merge branches 'clk-versa', 'clk-strdup', 'clk-amlogic', 'clk-allwinner' and ... | Stephen Boyd | 2 | -1/+61 |
| 2023-08-10 | clk: rockchip: rv1126: Add PD_VO clock tree | Jagan Teki | 1 | -0/+59 |
| 2023-07-19 | clk: Explicitly include correct DT includes | Rob Herring | 2 | -2/+2 |
| 2023-07-10 | clk: rockchip: rk3568: Fix PLL rate setting for 78.75MHz | Alibek Omarov | 1 | -1/+1 |
| 2023-07-10 | clk: rockchip: rk3568: Add PLL rate for 101MHz | Alibek Omarov | 1 | -0/+1 |
| 2023-04-25 | Merge branches 'clk-of', 'clk-samsung', 'clk-rockchip' and 'clk-qcom' into cl... | Stephen Boyd | 2 | -17/+27 |
| 2023-04-18 | clk: rockchip: rk3588: make gate linked clocks critical | Sebastian Reichel | 1 | -16/+26 |
| 2023-04-05 | clk: rockchip: Remove values for mmask and nmask in struct clk_fractional_div... | Christophe JAILLET | 1 | -2/+0 |
| 2023-03-07 | clk: rockchip: rk3399: allow clk_cifout to force clk_cifout_src to reparent | Quentin Schulz | 1 | -1/+1 |
| 2022-12-12 | Merge branches 'clk-spear', 'clk-fract', 'clk-rockchip' and 'clk-imx' into cl... | Stephen Boyd | 9 | -35/+3795 |
| 2022-11-23 | clk: rockchip: Fix memory leak in rockchip_clk_register_pll() | Xiu Jianfeng | 1 | -0/+1 |
| 2022-11-22 | clk: Remove a useless include | Christophe JAILLET | 1 | -1/+0 |
| 2022-11-15 | clk: rockchip: add clock controller for the RK3588 | Elaine Zhang | 5 | -1/+3447 |
| 2022-11-14 | clk: rockchip: add lookup table support | Sebastian Reichel | 2 | -15/+40 |
| 2022-11-14 | clk: rockchip: simplify rockchip_clk_add_lookup | Sebastian Reichel | 2 | -10/+6 |
| 2022-11-14 | clk: rockchip: allow additional mux options for cpu-clock frequency changes | Elaine Zhang | 2 | -0/+43 |
| 2022-11-14 | clk: rockchip: add pll type for RK3588 | Elaine Zhang | 2 | -1/+235 |
| 2022-11-14 | clk: rockchip: add register offset of the cores select parent | Elaine Zhang | 2 | -8/+23 |
| 2022-09-23 | clk: rockchip: Add clock controller support for RV1126 SoC | Jagan Teki | 4 | -0/+1165 |
| 2022-09-13 | clk: rockchip: Add MUXTBL variant | Elaine Zhang | 2 | -6/+38 |
| 2022-05-03 | clk: rockchip: Mark hclk_vo as critical on rk3568 | Sascha Hauer | 1 | -0/+1 |
| 2022-02-24 | clk: rockchip: re-add rational best approximation algorithm to the fractional... | Quentin Schulz | 1 | -0/+3 |
| 2022-02-23 | clk/rockchip: Use of_device_get_match_data() | Minghao Chi (CGEL ZTE) | 1 | -4/+2 |
| 2022-02-08 | clk: rockchip: Add CLK_SET_RATE_PARENT to the HDMI reference clock on rk3568 | Sascha Hauer | 1 | -1/+1 |
| 2022-02-08 | clk: rockchip: drop CLK_SET_RATE_PARENT from dclk_vop* on rk3568 | Sascha Hauer | 1 | -3/+3 |
| 2022-02-08 | clk: rockchip: Add more PLL rates for rk3568 | Sascha Hauer | 1 | -0/+6 |
| 2021-11-02 | clk: rockchip: drop module parts from rk3399 and rk3568 drivers | Heiko Stuebner | 3 | -10/+2 |
| 2021-11-02 | Revert "clk: rockchip: use module_platform_driver_probe" | Heiko Stuebner | 2 | -2/+2 |
| 2021-09-21 | clk: rockchip: use module_platform_driver_probe | Miles Chen | 2 | -2/+2 |
| 2021-09-20 | clk: rockchip: rk3399: expose PCLK_COREDBG_{B,L} | Brian Norris | 1 | -2/+2 |
| 2021-09-20 | clk: rockchip: rk3399: make CPU clocks critical | Brian Norris | 1 | -4/+7 |
| 2021-09-01 | Merge branches 'clk-nvidia', 'clk-rockchip', 'clk-at91' and 'clk-vc5' into cl... | Stephen Boyd | 3 | -3/+5 |
| 2021-08-12 | clk: fractional-divider: Export approximation algorithm to the CCF users | Andy Shevchenko | 1 | -14/+3 |
| 2021-07-29 | clk: rockchip: make rk3308 ddrphy4x clock critical | Yunhao Tian | 1 | -0/+1 |
| 2021-07-29 | clk: rockchip: drop GRF dependency for rk3328/rk3036 pll types | Peter Geis | 1 | -1/+1 |
| 2021-07-16 | clk: rockchip: Add support for hclk_sfc on rk3036 | Jon Lin | 1 | -1/+1 |
| 2021-07-16 | clk: rockchip: rk3036: fix up the sclk_sfc parent error | Jon Lin | 1 | -1/+2 |
| 2021-05-28 | clk: rockchip: export ACLK_VCODEC for RK3036 | Alex Bee | 1 | -1/+1 |
| 2021-05-24 | clk: rockchip: fix rk3568 cpll clk gate bits | Peter Geis | 1 | -5/+5 |
| 2021-05-11 | clk: rockchip: Optimize PLL table memory usage | Elaine Zhang | 1 | -11/+18 |
| 2021-03-21 | clk: rockchip: drop MODULE_ALIAS from rk3399 clock controller | Heiko Stuebner | 1 | -1/+0 |
| 2021-03-21 | clk: rockchip: drop parenthesis from ARM || COMPILE_TEST depends | Heiko Stuebner | 1 | -11/+11 |
| 2021-03-21 | clk: rockchip: add clock controller for rk3568 | Elaine Zhang | 4 | -1/+1762 |
| 2021-03-21 | clk: rockchip: support more core div setting | Elaine Zhang | 13 | -77/+98 |
| 2021-02-06 | clk: rockchip: fix DPHY gate locations on rk3368 | Heiko Stuebner | 1 | -2/+2 |
| 2021-02-06 | clk: rockchip: use clock id for SCLK_VIP_OUT on rk3368 | Heiko Stuebner | 1 | -1/+1 |
| 2021-02-06 | clk: rockchip: use clock ids for PCLK_DPHYRX and PCLK_DPHYTX0 on rk3368 | Heiko Stuebner | 1 | -2/+2 |
| 2021-01-26 | clk: rockchip: Demote non-conformant kernel-doc header in half-divider | Lee Jones | 1 | -1/+1 |
| 2021-01-26 | clk: rockchip: Demote kernel-doc abuses to standard comment blocks in plls | Lee Jones | 1 | -3/+3 |
| 2021-01-26 | clk: rockchip: Remove unused/undocumented struct members from clk-cpu | Lee Jones | 1 | -4/+0 |
| 2021-01-26 | clk: rockchip: Demote non-conformant kernel-doc headers in main clock code | Lee Jones | 1 | -2/+2 |
| 2020-11-29 | clk: rockchip: fix i2s gate bits on rk3066 and rk3188 | Johan Jonker | 1 | -3/+4 |
| 2020-11-29 | clk: rockchip: add CLK_SET_RATE_PARENT to sclk for rk3066a i2s and uart clocks | Johan Jonker | 1 | -14/+14 |
| 2020-11-29 | clk: rockchip: Remove redundant null check before clk_prepare_enable | Xu Wang | 1 | -2/+1 |
| 2020-10-26 | clk: rockchip: Add appropriate arch dependencies | Robin Murphy | 1 | -1/+11 |
| 2020-10-22 | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl... | Linus Torvalds | 8 | -85/+231 |
| 2020-10-07 | clk: rockchip: Initialize hw to error to avoid undefined behavior | Stephen Boyd | 1 | -1/+1 |
| 2020-09-22 | clk: rockchip: rk3399: Support module build | Elaine Zhang | 2 | -1/+57 |
| 2020-09-22 | clk: rockchip: fix the clk config to support module build | Elaine Zhang | 2 | -20/+100 |
| 2020-09-22 | clk: rockchip: Export some clock common APIs for module drivers | Elaine Zhang | 1 | -22/+30 |
| 2020-09-22 | clk: rockchip: Export rockchip_register_softrst() | Elaine Zhang | 1 | -3/+4 |
| 2020-09-22 | clk: rockchip: Export rockchip_clk_register_ddrclk() | Elaine Zhang | 1 | -0/+1 |
| 2020-09-22 | clk: rockchip: Use clk_hw_register_composite instead of clk_register_composit... | Elaine Zhang | 2 | -39/+40 |
| 2020-09-22 | clk: rockchip: rk3308: drop unused mux_timer_src_p | Krzysztof Kozlowski | 1 | -1/+0 |
| 2020-08-18 | clk: rockchip: Fix initialization of mux_pll_src_4plls_p | Nathan Chancellor | 1 | -1/+1 |
| 2020-07-22 | clk: rockchip: add sclk_mac_lbtest to rk3188_critical_clocks | Alex Bee | 1 | -0/+1 |
| 2020-07-08 | clk: rockchip: Revert "fix wrong mmc sample phase shift for rk3328" | Robin Murphy | 1 | -4/+4 |
| 2020-07-05 | clk: rockchip: use separate compatibles for rk3288w-cru | Heiko Stuebner | 1 | -2/+19 |
| 2020-06-17 | clk: rockchip: Handle clock tree for rk3288w variant | Mylène Josserand | 1 | -2/+18 |
| 2020-06-15 | clk: rockchip: convert rk3036 pll type to use internal lock status | Heiko Stuebner | 1 | -3/+23 |
| 2020-06-15 | clk: rockchip: convert basic pll lock_wait to use regmap_read_poll_timeout | Heiko Stuebner | 1 | -15/+6 |
| 2020-06-15 | clk: rockchip: convert rk3399 pll type to use readl_relaxed_poll_timeout | Heiko Stuebner | 1 | -11/+12 |
| 2020-04-13 | clk: rockchip: fix incorrect configuration of rk3228 aclk_gpu* clocks | Justin Swartz | 1 | -13/+4 |
| 2020-03-06 | clk: rockchip: fix mmc get phase | Jerome Brunet | 1 | -2/+2 |
| 2019-12-23 | clk: let init callback return an error code | Jerome Brunet | 1 | -11/+17 |
| 2019-11-05 | clk: rockchip: protect the pclk_usb_grf as critical on px30 | Heiko Stuebner | 1 | -1/+2 |
| 2019-11-05 | clk: rockchip: add video-related niu clocks as critical on px30 | Heiko Stuebner | 1 | -5/+10 |
| 2019-11-05 | clk: rockchip: move px30 critical clocks to correct clock controller | Heiko Stuebner | 1 | -4/+4 |
| 2019-11-05 | clk: rockchip: Add div50 clocks for px30 sdmmc, emmc, sdio and nandc | Finley Xiao | 1 | -4/+40 |
| 2019-10-31 | clk: rockchip: make clk_half_divider_ops static | Ben Dooks (Codethink) | 1 | -2/+1 |
| 2019-09-05 | clk: rockchip: Add clock controller for the rk3308 | Finley Xiao | 3 | -0/+969 |
| 2019-07-25 | clk: rockchip: Fix -Wunused-const-variable in rv1108 clk driver | Nathan Huckleberry | 1 | -1/+0 |
| 2019-07-17 | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl... | Linus Torvalds | 8 | -46/+27 |
| 2019-06-27 | clk: rockchip: export HDMIPHY clock on rk3228 | Heiko Stuebner | 1 | -1/+1 |
| 2019-06-27 | clk: rockchip: add watchdog pclk on rk3328 | Heiko Stuebner | 1 | -0/+3 |
| 2019-06-19 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 | Thomas Gleixner | 1 | -4/+1 |
| 2019-06-15 | clk: rockchip: convert pclk_wdt boilerplat to new SGRF_GATE macro | Heiko Stuebner | 4 | -36/+12 |
| 2019-06-14 | clk: rockchip: add a type from SGRF-controlled gate clocks | Heiko Stuebner | 1 | -0/+4 |
| 2019-06-06 | clk: rockchip: Remove 48 MHz PLL rate from rk3288 | Douglas Anderson | 1 | -1/+0 |
| 2019-06-05 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282 | Thomas Gleixner | 1 | -11/+1 |
| 2019-05-30 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 | Thomas Gleixner | 17 | -170/+17 |
| 2019-05-20 | clk: rockchip: add 1.464GHz cpu-clock rate to rk3228 | Justin Swartz | 1 | -0/+1 |
| 2019-05-20 | clk: rockchip: Slightly more accurate math in rockchip_mmc_get_phase() | Douglas Anderson | 1 | -3/+3 |
| 2019-05-20 | clk: rockchip: Don't yell about bad mmc phases when getting | Douglas Anderson | 1 | -3/+1 |
| 2019-05-20 | clk: rockchip: Use clk_hw_get_rate() in MMC phase calculation | Douglas Anderson | 1 | -2/+2 |
| 2019-05-15 | clk: Remove io.h from clk-provider.h | Stephen Boyd | 12 | -1/+13 |
| 2019-05-07 | Merge branches 'clk-hisi', 'clk-lochnagar', 'clk-allwinner', 'clk-rockchip' a... | Stephen Boyd | 4 | -26/+60 |
| 2019-04-23 | clk: core: replace clk_{readl,writel} with {readl,writel} | Jonas Gorski | 2 | -4/+4 |
| 2019-04-23 | clk: rockchip: undo several noc and special clocks as critical on rk3288 | Douglas Anderson | 1 | -9/+4 |
| 2019-04-12 | clk: rockchip: add a COMPOSITE_DIV_OFFSET clock-type | Finley Xiao | 2 | -3/+29 |
| 2019-04-12 | clk: rockchip: Turn on "aclk_dmac1" for suspend on rk3288 | Douglas Anderson | 1 | -0/+11 |
| 2019-04-12 | clk: rockchip: Limit use of USB PHY clock to USB on rk3288 | Matthias Kaehlcke | 1 | -2/+2 |
| 2019-04-12 | clk: rockchip: Fix video codec clocks on rk3288 | Douglas Anderson | 1 | -2/+2 |
| 2019-04-11 | clk: rockchip: Make rkpwm a critical clock on rk3288 | Douglas Anderson | 1 | -1/+3 |
| 2019-03-18 | clk: rockchip: fix wrong clock definitions for rk3328 | Jonas Karlman | 1 | -9/+9 |
| 2019-01-07 | clk: rockchip: add CLK_SET_RATE_PARENT for rk3066 lcdc dclks | Finley Xiao | 1 | -2/+2 |
| 2019-01-07 | clk: rockchip: fix frac settings of GPLL clock for rk3328 | Katsuhiro Suzuki | 1 | -6/+6 |
| 2018-11-26 | clk: rockchip: add clock-id to gate of ACODEC for rk3328 | Katsuhiro Suzuki | 1 | -1/+1 |
| 2018-11-19 | clk: rockchip: fix I2S1 clock gate register for rk3328 | Katsuhiro Suzuki | 1 | -1/+1 |
| 2018-11-15 | clk: rockchip: make rk3188 hclk_vio_bus critical | Mark Yao | 1 | -1/+2 |
| 2018-11-15 | clk: rockchip: fix rk3188 sclk_mac_lbtest parameter ordering | Heiko Stuebner | 1 | -2/+2 |
| 2018-11-15 | clk: rockchip: fix rk3188 sclk_smc gate data | Finley Xiao | 1 | -2/+2 |
| 2018-11-12 | clk: rockchip: fix typo in rk3188 spdif_frac parent | Johan Jonker | 1 | -1/+1 |
| 2018-10-17 | clk: rockchip: Fix static checker warning in rockchip_ddrclk_get_parent call | Enric Balletbo i Serra | 1 | -4/+0 |
| 2018-10-11 | clk: rockchip: use the newly added clock-id for hdmi on RK3066 | Heiko Stuebner | 1 | -1/+1 |
| 2018-10-11 | clk: rockchip: fix wrong mmc sample phase shift for rk3328 | Ziyuan Xu | 1 | -4/+4 |
| 2018-08-31 | clk: rockchip: improve rk3288 pll rates for better hdmi output | Urja Rannikko | 1 | -4/+25 |
| 2018-08-06 | clk: rockchip: Add pclk_rkpwm_pmu to PMU critical clocks in rk3399 | Levin Du | 1 | -0/+1 |
| 2018-07-08 | clk: rockchip: fix clk_i2sout parent selection bits on rk3399 | Alberto Panizzo | 1 | -1/+1 |
| 2018-07-06 | clk: rockchip: add clock controller for px30 | Elaine Zhang | 3 | -1/+1080 |
| 2018-07-06 | clk: rockchip: add support for half divider | Elaine Zhang | 4 | -0/+323 |
| 2018-05-23 | clk: rockchip: remove deprecated gate-clk code and dt-binding | Heiko Stuebner | 2 | -99/+0 |
| 2018-05-22 | clk: rockchip: use match_string() helper | Yisheng Xie | 1 | -11/+5 |
| 2018-03-23 | clk: rockchip: assign correct id for pclk_ddr and hclk_sd in rk3399 | Lin Huang | 1 | -2/+2 |
| 2018-03-23 | clk: rockchip: Fix error return in phase clock registration | Shawn Lin | 1 | -2/+4 |
| 2018-03-23 | clk: rockchip: Correct the behaviour of restoring cached phase | Shawn Lin | 1 | -2/+14 |
| 2018-03-23 | clk: rockchip: Fix wrong parents for MMC phase clock for rk3328 | Shawn Lin | 1 | -8/+8 |
| 2018-03-23 | clk: rockchip: Fix wrong parent for SDMMC phase clock for rk3228 | Shawn Lin | 1 | -1/+1 |
| 2018-03-14 | clk: rockchip: Add 1.6GHz PLL rate for rk3399 | Derek Basehore | 1 | -0/+1 |
| 2018-03-13 | clk: rockchip: Restore the clock phase after the rate was changed | Shawn Lin | 1 | -1/+38 |
| 2018-03-05 | clk: rockchip: Prevent calculating mmc phase if clock rate is zero | Shawn Lin | 1 | -0/+23 |
| 2018-03-02 | clk: rockchip: Free the memory on the error path | Shawn Lin | 1 | -4/+18 |
| 2018-02-12 | clk: rockchip: add flags for rk3328 dclk_lcdc | Zheng Yang | 1 | -1/+1 |
| 2018-02-12 | clk: rockchip: remove ignore_unused flag from rk3328 vio_h2p clocks | Heiko Stuebner | 1 | -2/+2 |
| 2018-02-12 | clk: rockchip: protect all remaining rk3328 interconnect clocks | Heiko Stuebner | 1 | -19/+37 |
| 2018-02-12 | clk: rockchip: export sclk_hdmi_sfc on rk3328 | Heiko Stuebner | 1 | -1/+1 |
| 2018-02-12 | clk: rockchip: fix hclk_vio_niu on rk3328 | Heiko Stuebner | 1 | -1/+2 |
| 2017-11-17 | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl... | Linus Torvalds | 3 | -9/+7 |
| 2017-11-02 | License cleanup: add SPDX GPL-2.0 license identifier to files with no license | Greg Kroah-Hartman | 1 | -0/+1 |
| 2017-10-31 | Merge tag 'v4.15-rockchip-clk-1' of git://git.kernel.org/pub/scm/linux/kernel... | Stephen Boyd | 3 | -9/+7 |
| 2017-10-14 | clk: rockchip: use new cif/vdpu clock ids on rk3188 | Heiko Stuebner | 1 | -6/+6 |
| 2017-10-14 | clk: rockchip: export clock pclk_efuse_256 for RK3368 SoCs | Romain Perier | 1 | -1/+1 |
| 2017-09-28 | clk: rockchip: Remove superfluous error message in rockchip_clk_register_cpuc... | Markus Elfring | 1 | -2/+0 |
| 2017-09-17 | clk: rockchip: add sclk_timer5 as critical clock on rk3128 | Elaine Zhang | 1 | -0/+1 |
| 2017-09-17 | clk: rockchip: fix up rk3128 pvtm and mipi_24m gate regs error | Elaine Zhang | 1 | -4/+4 |
| 2017-09-17 | clk: rockchip: add pclk_pmu as critical clock on rk3128 | Elaine Zhang | 1 | -1/+2 |
| 2017-08-23 | clk: rockchip: Mark rockchip_fractional_approximation static | Stephen Boyd | 1 | -1/+1 |
| 2017-08-22 | clk: rockchip: fix the rv1108 clk_mac sel register description | Elaine Zhang | 1 | -1/+1 |
| 2017-08-22 | clk: rockchip: rename rv1108 macphy clock to mac | Elaine Zhang | 1 | -6/+6 |
| 2017-08-22 | clk: rockchip: add rv1108 ACLK_GMAC and PCLK_GMAC clocks | Elaine Zhang | 1 | -0/+2 |
| 2017-08-22 | clk: rockchip: add rk3228 SCLK_SDIO_SRC clk id | Elaine Zhang | 1 | -1/+1 |
| 2017-08-08 | clk: rockchip: add special approximation to fix up fractional clk's jitter | Elaine Zhang | 1 | -0/+36 |
| 2017-08-08 | clk: rockchip: modify rk3128 clk driver to also support rk3126 | Elaine Zhang | 1 | -14/+55 |
| 2017-08-08 | clk: rockchip: add some critical clocks for rv1108 SoC | Elaine Zhang | 1 | -1/+7 |
| 2017-08-08 | clk: rockchip: rename some of clks for rv1108 SoC | Elaine Zhang | 1 | -14/+14 |
| 2017-08-08 | clk: rockchip: fix up some clks describe error for rv1108 SoC | Elaine Zhang | 1 | -59/+62 |
| 2017-08-08 | clk: rockchip: support more clks for rv1108 | Elaine Zhang | 1 | -2/+276 |
| 2017-08-08 | clk: rockchip: fix up the pll clks error for rv1108 SoC | Elaine Zhang | 1 | -3/+3 |
| 2017-08-06 | clk: rockchip: support more rates for rv1108 cpuclk | Elaine Zhang | 1 | -4/+19 |
| 2017-06-02 | clk: rockchip: mark some special clk as critical on rk3368 | Elaine Zhang | 1 | -1/+4 |
| 2017-06-02 | clk: rockchip: mark noc and some special clk as critical on rk3288 | Elaine Zhang | 1 | -4/+10 |
| 2017-06-02 | clk: rockchip: mark noc and some special clk as critical on rk3228 | Elaine Zhang | 1 | -1/+29 |
| 2017-06-02 | clk: rockchip: mark pclk_ddrupctl as critical_clock on rk3036 | Elaine Zhang | 1 | -0/+1 |
| 2017-06-02 | clk: rockchip: add clock controller for rk3128 | Elaine Zhang | 2 | -0/+613 |
| 2017-06-02 | clk: rockchip: export more rk3228 clocks ids | Elaine Zhang | 1 | -46/+46 |
| 2017-06-02 | clk: rockchip: add ids for rk3399 testclks used for camera handling | Eddie Cai | 1 | -2/+2 |
| 2017-05-17 | clk: rockchip: fix up the RK3228 clk cpu setting table | Elaine Zhang | 1 | -12/+30 |
| 2017-04-12 | Merge tag 'v4.12-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/... | Michael Turquette | 7 | -238/+253 |
| 2017-03-22 | clk: rockchip: add pll_wait_lock for pll_enable | Elaine Zhang | 1 | -0/+3 |
| 2017-03-22 | clk: rockchip: rename RK1108 to RV1108 | Andy Yan | 3 | -222/+222 |
| 2017-03-10 | clk: rockchip: mark some rk3368 core-clks as critical | Elaine Zhang | 1 | -0/+3 |
| 2017-03-10 | clk: rockchip: export SCLK_TIMERXX id for timers on rk3368 | Elaine Zhang | 1 | -12/+12 |
| 2017-03-10 | clk: rockchip: describe clk_gmac using the new muxgrf type on rk3328 | Elaine Zhang | 1 | -0/+9 |
| 2017-03-07 | clk: rockchip: Make uartpll a child of the gpll on rk3036 | Heiko Stuebner | 1 | -0/+7 |
| 2017-03-07 | clk: rockchip: add "," to mux_pll_src_apll_dpll_gpll_usb480m_p on rk3036 | Heiko Stuebner | 1 | -1/+1 |
| 2017-03-06 | clk: rockchip: Set "ignore unused" for PMU M0 clocks on rk3399 | Douglas Anderson | 1 | -4/+4 |
| 2017-01-23 | clk: rockchip: rk3288: make all niu clocks critical | Jacob Chen | 1 | -7/+14 |
| 2017-01-22 | clk: rockchip: use rk3288 vip_out clock ids | Jacob Chen | 1 | -1/+1 |
| 2017-01-18 | clk: rockchip: fix the incorrect pclk_edp div width for RK3399 | Xing Zheng | 1 | -1/+1 |
| 2017-01-13 | clk: rockchip: use clock ids for memory controller parts on rk3066/rk3188 | Heiko Stuebner | 1 | -2/+2 |
