| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2024-05-03 | clk: meson: s4: fix module autoloading | Krzysztof Kozlowski | 2 | -0/+2 |
| 2024-04-10 | clk: meson: fix module license to GPL only | Neil Armstrong | 18 | -18/+18 |
| 2024-04-10 | clk: meson: g12a: make VCLK2 and ENCL clock path configurable by CCF | Neil Armstrong | 2 | -20/+57 |
| 2024-04-10 | clk: meson: add vclk driver | Neil Armstrong | 4 | -0/+197 |
| 2024-03-29 | clk: meson: pll: print out pll name when unable to lock it | Dmitry Rokosov | 1 | -2/+2 |
| 2024-03-29 | clk: meson: s4: pll: determine maximum register in regmap config | Dmitry Rokosov | 1 | -0/+1 |
| 2024-03-29 | clk: meson: s4: peripherals: determine maximum register in regmap config | Dmitry Rokosov | 1 | -0/+1 |
| 2024-03-29 | clk: meson: a1: pll: determine maximum register in regmap config | Dmitry Rokosov | 1 | -0/+1 |
| 2024-03-29 | clk: meson: a1: peripherals: determine maximum register in regmap config | Dmitry Rokosov | 1 | -0/+1 |
| 2024-02-05 | clk: meson: Add missing clocks to axg_clk_regmaps | Igor Prusov | 1 | -0/+2 |
| 2023-11-24 | clk: meson: g12a: add CSI & ISP gates clocks | Neil Armstrong | 1 | -0/+9 |
| 2023-11-24 | clk: meson: g12a: add MIPI ISP clocks | Neil Armstrong | 2 | -0/+67 |
| 2023-11-24 | clk: meson: g12a: add CTS_ENCL & CTS_ENCL_SEL clocks | Neil Armstrong | 1 | -0/+40 |
| 2023-10-23 | clk: meson: S4: select CONFIG_COMMON_CLK_MESON_CLKC_UTILS | Arnd Bergmann | 1 | -0/+2 |
| 2023-09-27 | clk: meson: S4: add support for Amlogic S4 SoC peripheral clock controller | Yu Tu | 4 | -0/+3881 |
| 2023-09-27 | clk: meson: S4: add support for Amlogic S4 SoC PLL clock driver | Yu Tu | 4 | -0/+918 |
| 2023-08-30 | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl... | Linus Torvalds | 28 | -3287/+2727 |
| 2023-08-30 | Merge branches 'clk-versa', 'clk-strdup', 'clk-amlogic', 'clk-allwinner' and ... | Stephen Boyd | 28 | -3279/+2719 |
| 2023-08-08 | clk: meson: axg-audio: move bindings include to main driver | Neil Armstrong | 2 | -3/+2 |
| 2023-08-08 | clk: meson: meson8b: move bindings include to main driver | Neil Armstrong | 2 | -7/+3 |
| 2023-08-08 | clk: meson: a1: move bindings include to main driver | Neil Armstrong | 4 | -6/+4 |
| 2023-08-08 | clk: meson: eeclk: move bindings include to main driver | Neil Armstrong | 6 | -9/+6 |
| 2023-08-08 | clk: meson: aoclk: move bindings include to main driver | Neil Armstrong | 6 | -45/+9 |
| 2023-08-08 | dt-bindings: clk: axg-audio-clkc: expose all clock ids | Neil Armstrong | 1 | -70/+0 |
| 2023-08-08 | dt-bindings: clk: amlogic,a1-pll-clkc: expose all clock ids | Neil Armstrong | 1 | -15/+0 |
| 2023-08-08 | dt-bindings: clk: amlogic,a1-peripherals-clkc: expose all clock ids | Neil Armstrong | 1 | -63/+0 |
| 2023-08-08 | dt-bindings: clk: meson8b-clkc: expose all clock ids | Neil Armstrong | 1 | -108/+0 |
| 2023-08-08 | dt-bindings: clk: g12a-aoclkc: expose all clock ids | Neil Armstrong | 1 | -17/+0 |
| 2023-08-08 | dt-bindings: clk: g12a-clks: expose all clock ids | Neil Armstrong | 1 | -140/+0 |
| 2023-08-08 | dt-bindings: clk: axg-clkc: expose all clock ids | Neil Armstrong | 1 | -58/+0 |
| 2023-08-08 | dt-bindings: clk: gxbb-clkc: expose all clock ids | Neil Armstrong | 1 | -76/+0 |
| 2023-08-08 | clk: meson: migrate axg-audio out of hw_onecell_data to drop NR_CLKS | Neil Armstrong | 3 | -428/+424 |
| 2023-08-08 | clk: meson: migrate meson8b out of hw_onecell_data to drop NR_CLKS | Neil Armstrong | 3 | -658/+660 |
| 2023-08-08 | clk: meson: migrate a1 clock drivers out of hw_onecell_data to drop NR_CLKS | Neil Armstrong | 5 | -180/+183 |
| 2023-08-08 | clk: meson: migrate meson-aoclk out of hw_onecell_data to drop NR_CLKS | Neil Armstrong | 9 | -73/+68 |
| 2023-08-08 | clk: meson: migrate meson-eeclk out of hw_onecell_data to drop NR_CLKS | Neil Armstrong | 9 | -1323/+1312 |
| 2023-08-08 | clk: meson: introduce meson-clkc-utils | Neil Armstrong | 4 | -0/+48 |
| 2023-07-19 | clk: Explicitly include correct DT includes | Rob Herring | 8 | -8/+8 |
| 2023-07-11 | clk: meson: change usleep_range() to udelay() for atomic context | Dmitry Rokosov | 1 | -2/+2 |
| 2023-06-15 | clk: meson: pll: remove unneeded semicolon | Jiapeng Chong | 1 | -1/+1 |
| 2023-06-12 | clk: meson: a1: Staticize rtc clk | Stephen Boyd | 1 | -1/+1 |
| 2023-05-30 | clk: meson: a1: add Amlogic A1 Peripherals clock controller driver | Dmitry Rokosov | 4 | -0/+2367 |
| 2023-05-30 | clk: meson: a1: add Amlogic A1 PLL clock controller driver | Dmitry Rokosov | 4 | -0/+414 |
| 2023-05-30 | clk: meson: introduce new pll power-on sequence for A1 SoC family | Dmitry Rokosov | 2 | -0/+25 |
| 2023-05-30 | clk: meson: make pll rst bit as optional | Dmitry Rokosov | 1 | -7/+17 |
| 2023-01-13 | clk: meson: clk-cpu-dyndiv: switch from .round_rate to .determine_rate | Martin Blumenstingl | 1 | -5/+4 |
| 2023-01-13 | clk: meson: sclk-div: switch from .round_rate to .determine_rate | Martin Blumenstingl | 1 | -5/+6 |
| 2023-01-13 | clk: meson: dualdiv: switch from .round_rate to .determine_rate | Martin Blumenstingl | 1 | -8/+13 |
| 2023-01-13 | clk: meson: mpll: Switch from .round_rate to .determine_rate | Martin Blumenstingl | 1 | -7/+13 |
| 2022-12-12 | Merge branches 'clk-bindings', 'clk-renesas', 'clk-amlogic', 'clk-allwinner' ... | Stephen Boyd | 1 | -8/+12 |
| 2022-11-22 | clk: Remove a useless include | Christophe JAILLET | 1 | -1/+0 |
| 2022-11-08 | clk: meson: pll: add pcie lock retry workaround | Heiner Kallweit | 1 | -4/+8 |
| 2022-11-08 | clk: meson: pll: adjust timeout in meson_clk_pll_wait_lock() | Heiner Kallweit | 1 | -4/+4 |
| 2022-08-19 | clk: meson: Hold reference returned by of_get_parent() | Liang He | 3 | -3/+12 |
| 2022-06-15 | clk: meson: axg-audio: Don't duplicate devm_clk_get_enabled() | Uwe Kleine-König | 1 | -32/+4 |
| 2022-03-11 | clk: cleanup comments | Tom Rix | 1 | -1/+1 |
| 2021-11-30 | clk: meson: gxbb: Fix the SDM_EN bit for MPLL0 on GXBB | Martin Blumenstingl | 1 | -3/+41 |
| 2021-09-23 | clk: meson: meson8b: Make the video clock trees mutable | Martin Blumenstingl | 1 | -38/+38 |
| 2021-09-23 | clk: meson: meson8b: Initialize the HDMI PLL registers | Martin Blumenstingl | 2 | -5/+48 |
| 2021-09-23 | clk: meson: meson8b: Add the HDMI PLL M/N parameters | Martin Blumenstingl | 1 | -0/+22 |
| 2021-09-23 | clk: meson: meson8b: Add the vid_pll_lvds_en gate clock | Martin Blumenstingl | 2 | -2/+24 |
| 2021-09-23 | clk: meson: meson8b: Use CLK_SET_RATE_NO_REPARENT for vclk{,2}_in_sel | Martin Blumenstingl | 1 | -2/+2 |
| 2021-09-23 | clk: meson: meson8b: Export the video clocks | Martin Blumenstingl | 1 | -11/+1 |
| 2021-06-30 | clk: meson: regmap: switch to determine_rate for the dividers | Martin Blumenstingl | 1 | -10/+9 |
| 2021-06-09 | clk: meson: g12a: Add missing NNA source clocks for g12b | Nick Xie | 1 | -0/+6 |
| 2021-05-24 | clk: meson: axg-audio: improve deferral handling | Jerome Brunet | 1 | -3/+2 |
| 2021-05-20 | clk: meson: g12a: fix gp0 and hifi ranges | Jerome Brunet | 1 | -1/+1 |
| 2021-05-19 | clk: meson: pll: switch to determine_rate for the PLL ops | Martin Blumenstingl | 1 | -11/+15 |
| 2021-02-09 | clk: meson: axg: Remove MIPI enable clock gate | Remi Pommarel | 2 | -4/+0 |
| 2021-01-04 | clk: meson: meson8b: remove compatibility code for old .dtbs | Martin Blumenstingl | 1 | -40/+5 |
| 2021-01-04 | clk: meson: clk-pll: propagate the error from meson_clk_pll_set_rate() | Martin Blumenstingl | 1 | -2/+3 |
| 2021-01-04 | clk: meson: clk-pll: make "ret" a signed integer | Martin Blumenstingl | 1 | -1/+2 |
| 2021-01-04 | clk: meson: clk-pll: fix initializing the old rate (fallback) for a PLL | Martin Blumenstingl | 1 | -1/+1 |
| 2020-12-21 | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl... | Linus Torvalds | 11 | -61/+1004 |
| 2020-11-26 | clk: meson: g12a: add MIPI DSI Host Pixel Clock | Neil Armstrong | 2 | -1/+76 |
| 2020-11-23 | clk: meson: enable building as modules | Kevin Hilman | 9 | -9/+34 |
| 2020-11-23 | clk: meson: Kconfig: fix dependency for G12A | Kevin Hilman | 1 | -0/+1 |
| 2020-11-23 | clk: meson: axg: add MIPI DSI Host clock | Neil Armstrong | 2 | -1/+69 |
| 2020-11-23 | clk: meson: axg: add Video Clocks | Neil Armstrong | 2 | -1/+773 |
| 2020-11-14 | clk: meson: g12: use devm variant to register notifiers | Jerome Brunet | 1 | -14/+20 |
| 2020-11-14 | clk: meson: g12: drop use of __clk_lookup() | Jerome Brunet | 1 | -36/+32 |
| 2020-10-28 | clk: define to_clk_regmap() as inline function | Arnd Bergmann | 1 | -1/+4 |
| 2020-10-20 | Merge branches 'clk-semicolon', 'clk-axi-clkgen', 'clk-qoriq', 'clk-baikal', ... | Stephen Boyd | 1 | -1/+1 |
| 2020-10-13 | clk: meson: use semicolons rather than commas to separate statements | Julia Lawall | 1 | -1/+1 |
| 2020-09-10 | clk: meson: make shipped controller configurable | Jerome Brunet | 1 | -9/+17 |
| 2020-08-29 | clk: meson: g12a: mark fclk_div2 as critical | Stefan Agner | 1 | -0/+11 |
| 2020-08-17 | clk: meson: axg-audio: fix g12a tdmout sclk inverter | Jerome Brunet | 1 | -25/+60 |
| 2020-08-17 | clk: meson: axg-audio: separate axg and g12a regmap tables | Jerome Brunet | 1 | -8/+127 |
| 2020-08-17 | clk: meson: add sclk-ws driver | Jerome Brunet | 2 | -0/+62 |
| 2020-07-21 | Merge branch 'clk-amlogic' into clk-next | Stephen Boyd | 4 | -19/+178 |
| 2020-07-10 | Replace HTTP links with HTTPS ones: Common CLK framework | Alexander A. Klimov | 1 | -1/+1 |
| 2020-07-09 | clk: meson: meson8b: add the vclk2_en gate clock | Martin Blumenstingl | 2 | -6/+27 |
| 2020-07-09 | clk: meson: meson8b: add the vclk_en gate clock | Martin Blumenstingl | 2 | -6/+27 |
| 2020-06-24 | clk: meson: meson8b: Drop CLK_IS_CRITICAL from fclk_div2 | Martin Blumenstingl | 1 | -7/+0 |
| 2020-06-19 | clk: meson: g12a: Add support for NNA CLK source clocks | Dmitry Shmidt | 2 | -1/+125 |
| 2020-05-02 | clk: meson: meson8b: Don't rely on u-boot to init all GP_PLL registers | Martin Blumenstingl | 2 | -0/+13 |
| 2020-04-29 | clk: meson: meson8b: Make the CCF use the glitch-free VPU mux | Martin Blumenstingl | 1 | -3/+11 |
| 2020-04-29 | clk: meson: meson8b: Fix the vclk_div{1, 2, 4, 6, 12}_en gate bits | Martin Blumenstingl | 1 | -5/+5 |
| 2020-04-29 | clk: meson: meson8b: Fix the polarity of the RESET_N lines | Martin Blumenstingl | 1 | -23/+56 |
| 2020-04-29 | clk: meson: meson8b: Fix the first parent of vid_pll_in_sel | Martin Blumenstingl | 1 | -1/+1 |
| 2020-04-16 | clk: meson: g12a: Prepare the GPU clock tree to change at runtime | Martin Blumenstingl | 1 | -8/+22 |
| 2020-04-16 | clk: meson: gxbb: Prepare the GPU clock tree to change at runtime | Martin Blumenstingl | 1 | -18/+22 |
| 2020-04-14 | clk: meson: meson8b: make the hdmi_sys clock tree mutable | Martin Blumenstingl | 1 | -3/+3 |
| 2020-04-14 | clk: meson8b: export the HDMI system clock | Martin Blumenstingl | 1 | -1/+0 |
| 2020-02-21 | clk: meson: meson8b: set audio output clock hierarchy | Martin Blumenstingl | 1 | -8/+13 |
| 2020-02-19 | clk: meson: g12a: add support for the SPICC SCLK Source clocks | Neil Armstrong | 2 | -1/+134 |
| 2020-02-13 | clk: meson: gxbb: set audio output clock hierarchy | Jerome Brunet | 1 | -8/+10 |
| 2020-02-13 | clk: meson: gxbb: add the gxl internal dac gate | Jerome Brunet | 2 | -1/+4 |
| 2020-01-31 | Merge branches 'clk-debugfs-danger', 'clk-basic-hw', 'clk-renesas', 'clk-amlo... | Stephen Boyd | 5 | -56/+229 |
| 2020-01-07 | clk: meson: meson8b: make the CCF use the glitch-free mali mux | Martin Blumenstingl | 1 | -4/+7 |
| 2019-12-23 | clk: let init callback return an error code | Jerome Brunet | 4 | -4/+12 |
| 2019-12-16 | Merge branch 'v5.5/fixes' into v5.6/drivers | Jerome Brunet | 2 | -0/+10 |
| 2019-12-16 | clk: meson: pll: Fix by 0 division in __pll_params_to_rate() | Remi Pommarel | 1 | -0/+9 |
| 2019-12-16 | clk: meson: g12a: fix missing uart2 in regmap table | Jerome Brunet | 1 | -0/+1 |
| 2019-12-11 | clk: meson: meson8b: use of_clk_hw_register to register the clocks | Martin Blumenstingl | 1 | -1/+1 |
| 2019-12-11 | clk: meson: meson8b: don't register the XTAL clock when provided via OF | Martin Blumenstingl | 1 | -3/+9 |
| 2019-12-11 | clk: meson: meson8b: change references to the XTAL clock to use [fw_]name | Martin Blumenstingl | 1 | -34/+44 |
| 2019-12-11 | clk: meson: meson8b: use clk_hw_set_parent in the CPU clock notifier | Martin Blumenstingl | 1 | -13/+8 |
| 2019-12-11 | clk: meson: add a driver for the Meson8/8b/8m2 DDR clock controller | Martin Blumenstingl | 2 | -1/+150 |
| 2019-10-14 | clk: meson: axg-audio: use devm_platform_ioremap_resource() to simplify code | YueHaibing | 1 | -3/+1 |
| 2019-10-08 | clk: meson: axg_audio: add sm1 support | Jerome Brunet | 2 | -30/+574 |
| 2019-10-08 | clk: meson: axg-audio: provide clk top signal name | Jerome Brunet | 2 | -4/+17 |
| 2019-10-08 | clk: meson: axg-audio: prepare sm1 addition | Jerome Brunet | 1 | -685/+782 |
| 2019-10-08 | clk: meson: axg-audio: fix regmap last register | Jerome Brunet | 1 | -1/+1 |
| 2019-10-08 | clk: meson: axg-audio: remove useless defines | Jerome Brunet | 1 | -4/+0 |
| 2019-10-01 | clk: meson: g12a: set CLK_MUX_ROUND_CLOSEST on the cpu clock muxes | Neil Armstrong | 1 | -0/+9 |
| 2019-10-01 | clk: meson: g12a: fix cpu clock rate setting | Neil Armstrong | 1 | -2/+2 |
| 2019-10-01 | clk: meson: gxbb: let sar_adc_clk_div set the parent clock rate | Martin Blumenstingl | 1 | -0/+1 |
| 2019-09-19 | Merge branches 'clk-init-destroy', 'clk-doc', 'clk-imx' and 'clk-allwinner' i... | Stephen Boyd | 1 | -2/+5 |
| 2019-08-26 | clk: meson: g12a: add support for SM1 CPU 1, 2 & 3 clocks | Neil Armstrong | 2 | -1/+61 |
| 2019-08-26 | clk: meson: g12a: add support for SM1 DynamIQ Shared Unit clock | Neil Armstrong | 2 | -1/+198 |
| 2019-08-26 | clk: meson: g12a: add support for SM1 GP1 PLL | Neil Armstrong | 2 | -1/+310 |
| 2019-08-20 | clk: meson: axg-audio: add g12a reset support | Jerome Brunet | 2 | -2/+106 |
| 2019-08-16 | clk: meson: axg-audio: Don't reference clk_init_data after registration | Stephen Boyd | 1 | -2/+5 |
| 2019-08-09 | Merge branch 'v5.4/dt' into v5.4/drivers | Jerome Brunet | 1 | -1/+0 |
| 2019-08-09 | clk: meson: g12a: expose CPUB clock ID for G12B | Neil Armstrong | 1 | -1/+0 |
| 2019-08-09 | clk: meson: g12a: add notifiers to handle cpu clock change | Neil Armstrong | 1 | -54/+481 |
| 2019-08-09 | clk: meson: add g12a cpu dynamic divider driver | Neil Armstrong | 4 | -0/+99 |
| 2019-07-29 | clk: meson: remove clk input helper | Alexandre Mergnat | 4 | -72/+0 |
| 2019-07-29 | clk: meson: remove ee input bypass clocks | Alexandre Mergnat | 3 | -13/+0 |
| 2019-07-29 | clk: meson: clk-regmap: migrate to new parent description method | Alexandre Mergnat | 5 | -6/+21 |
| 2019-07-29 | clk: meson: meson8b: migrate to the new parent description method | Alexandre Mergnat | 1 | -211/+496 |
| 2019-07-29 | clk: meson: axg: migrate to the new parent description method | Alexandre Mergnat | 1 | -60/+144 |
| 2019-07-29 | clk: meson: gxbb: migrate to the new parent description method | Alexandre Mergnat | 1 | -203/+451 |
| 2019-07-29 | clk: meson: g12a: migrate to the new parent description method | Alexandre Mergnat | 1 | -394/+693 |
| 2019-07-29 | clk: meson: remove ao input bypass clocks | Alexandre Mergnat | 3 | -46/+0 |
| 2019-07-29 | clk: meson: axg-aoclk: migrate to the new parent description method | Alexandre Mergnat | 1 | -26/+37 |
| 2019-07-29 | clk: meson: gxbb-aoclk: migrate to the new parent description method | Alexandre Mergnat | 1 | -28/+27 |
| 2019-07-29 | clk: meson: g12a-aoclk: migrate to the new parent description method | Alexandre Mergnat | 1 | -31/+50 |
| 2019-07-29 | clk: meson: axg-audio: migrate to the new parent description method | Alexandre Mergnat | 2 | -142/+120 |
| 2019-07-25 | clk: meson: g12a: fix hifi typo in mali parent_names | Alexandre Mergnat | 1 | -1/+1 |
| 2019-07-17 | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl... | Linus Torvalds | 10 | -23/+1074 |
| 2019-06-28 | Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/... | Linus Torvalds | 3 | -8/+8 |
| 2019-06-11 | clk: meson: g12a: mark fclk_div3 as critical | Neil Armstrong | 1 | -0/+10 |
| 2019-06-11 | clk: meson: g12a: Add support for G12B CPUB clocks | Neil Armstrong | 2 | -1/+801 |
| 2019-06-11 | clk: meson-g12a: add temperature sensor clocks | Guillaume La Roque | 2 | -1/+33 |
| 2019-06-11 | clk: meson: meson8b: add the cts_i958 clock | Martin Blumenstingl | 2 | -1/+25 |
| 2019-06-11 | clk: meson: meson8b: add the cts_mclk_i958 clocks | Martin Blumenstingl | 2 | -1/+69 |
| 2019-06-11 | clk: meson: meson8b: add the cts_amclk clocks | Martin Blumenstingl | 2 | -1/+69 |
| 2019-05-21 | treewide: Add SPDX license identifier - Makefile/Kconfig | Thomas Gleixner | 2 | -0/+2 |
| 2019-05-20 | clk: meson: g12a: add controller register init | Jerome Brunet | 1 | -1/+7 |
| 2019-05-20 | clk: meson: eeclk: add init regs | Jerome Brunet | 2 | -0/+5 |
| 2019-05-20 | clk: meson: g12a: add mpll register init sequences | Jerome Brunet | 1 | -0/+24 |
| 2019-05-20 | clk: meson: mpll: add init callback and regs | Jerome Brunet | 2 | -11/+26 |
| 2019-05-20 | clk: meson: axg: spread spectrum is on mpll2 | Jerome Brunet | 1 | -5/+5 |
| 2019-05-20 | clk: meson: gxbb: no spread spectrum on mpll0 | Jerome Brunet | 1 | -5/+0 |
| 2019-05-20 | clk: meson: mpll: properly handle spread spectrum | Jerome Brunet | 2 | -3/+7 |
| 2019-05-20 | clk: meson: meson8b: fix a typo in the VPU parent names array variable | Martin Blumenstingl | 1 | -5/+5 |
| 2019-05-20 | clk: meson: fix MPLL 50M binding id typo | Jerome Brunet | 2 | -3/+3 |
| 2019-05-07 | Merge branches 'clk-doc', 'clk-more-critical', 'clk-meson' and 'clk-basic-be'... | Stephen Boyd | 9 | -516/+2171 |
| 2019-04-08 | clk: meson: axg-audio: add g12a support | Maxime Jourdan | 2 | -8/+239 |
| 2019-04-08 | clk: meson: axg-audio: don't register inputs in the onecell data | Jerome Brunet | 2 | -44/+6 |
| 2019-04-08 | clk: meson: axg_audio: replace prefix axg by aud | Jerome Brunet | 1 | -482/+482 |
| 2019-04-01 | clk: meson: meson8b: add the video decoder clock trees | Martin Blumenstingl | 2 | -1/+328 |
| 2019-04-01 | clk: meson: meson8b: add the VPU clock trees | Martin Blumenstingl | 2 | -1/+175 |
| 2019-04-01 | clk: meson: meson8b: add support for the GP_PLL clock on Meson8m2 | Martin Blumenstingl | 2 | -1/+66 |
| 2019-04-01 | clk: meson: meson8b: use a separate clock table for Meson8m2 | Martin Blumenstingl | 1 | -1/+192 |
| 2019-04-01 | clk: meson-g12a: add video decoder clocks | Maxime Jourdan | 2 | -1/+170 |
| 2019-04-01 | clk: meson-g12a: add PCIE PLL clocks | Neil Armstrong | 2 | -1/+122 |
| 2019-04-01 | clk: meson-pll: add reduced specific clk_ops for G12A PCIe PLL | Neil Armstrong | 2 | -0/+27 |
| 2019-04-01 | clk: meson: g12a: add cpu clocks | Neil Armstrong | 2 | -1/+371 |
| 2019-04-01 | dt-bindings: clock: g12a-aoclk: expose CLKID_AO_CTS_OSCIN | Neil Armstrong | 1 | -1/+0 |
| 2019-04-01 | dt-bindings: clock: axg-audio: unexpose controller inputs | Jerome Brunet | 1 | -0/+20 |
| 2019-03-29 | clk: meson: vid-pll-div: remove warning and return 0 on invalid config | Neil Armstrong | 1 | -2/+2 |
| 2019-03-25 | clk: meson: pll: fix rounding and setting a rate that matches precisely | Martin Blumenstingl | 1 | -1/+1 |
| 2019-03-19 | clk: g12a-aoclk: re-export CLKID_AO_SAR_ADC_SEL clock id | Neil Armstrong | 1 | -1/+0 |
| 2019-03-19 | clk: meson-g12a: fix VPU clock parents | Neil Armstrong | 1 | -1/+1 |
| 2019-03-19 | clk: meson: g12a: fix VPU clock muxes mask | Maxime Jourdan | 1 | -2/+2 |
| 2019-03-19 | clk: meson-gxbb: round the vdec dividers to closest | Maxime Jourdan | 1 | -0/+2 |
| 2019-02-13 | clk: meson: meson8b: fix the naming of the APB clocks | Martin Blumenstingl | 2 | -14/+14 |
| 2019-02-13 | clk: meson: Add G12A AO Clock + Reset Controller | Neil Armstrong | 4 | -1/+491 |
| 2019-02-04 | clk: meson: factorise meson64 peripheral clock controller drivers | Jerome Brunet | 7 | -176/+313 |
| 2019-02-04 | clk: meson: g12a: add peripheral clock controller | Jian Hu | 5 | -2/+2594 |
| 2019-02-04 | clk: meson: pll: update driver for the g12a | Jerome Brunet | 2 | -59/+154 |
| 2019-02-02 | clk: meson: rework and clean drivers dependencies | Jerome Brunet | 29 | -281/+465 |
| 2019-02-02 | clk: meson: axg-audio does not require syscon | Jerome Brunet | 1 | -1/+1 |
| 2019-01-18 | clk: meson: ao-clkc: claim clock controller input clocks from DT | Jerome Brunet | 4 | -14/+82 |
| 2019-01-18 | clk: meson: axg: claim clock controller input clock from DT | Jerome Brunet | 1 | -8/+19 |
| 2019-01-18 | clk: meson: gxbb: claim clock controller input clock from DT | Jerome Brunet | 1 | -13/+24 |
| 2019-01-07 | clk: meson: meson8b: add the GPU clock tree | Martin Blumenstingl | 2 | -1/+154 |
