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author | Zhang Rui <rui.zhang@intel.com> | 2023-08-27 14:12:29 +0800 |
---|---|---|
committer | Zhang Rui <rui.zhang@intel.com> | 2023-09-27 22:14:19 +0800 |
commit | 8e20ced057423f0edaf40b650facc221e8030b33 (patch) | |
tree | 12deccac08181c7cbcaaf632f91c858491ccf1ae /tools/power | |
parent | 3d982ac0dafeab860b9d42f5cc41a78753275fdd (diff) | |
download | linux-8e20ced057423f0edaf40b650facc221e8030b33.tar.gz |
tools/power/turbostat: Adjust cstate for is_dnv() models
Enable CC1 and disable CC3/CC7/PC3/PC7 for is_dnv() models.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'tools/power')
-rw-r--r-- | tools/power/x86/turbostat/turbostat.c | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index e95972edde3c1..069704ef3c803 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -678,7 +678,7 @@ static const struct platform_features gmtd_features = { .has_nhm_msrs = 1, .bclk_freq = BCLK_100MHZ, .crystal_freq = 25000000, - .supported_cstates = CC1 | CC3 | CC6 | CC7 | PC2 | PC3 | PC6 | PC7, + .supported_cstates = CC1 | CC6 | PC2 | PC6, .cst_limit = CST_LIMIT_GMT, .trl_msrs = TRL_BASE | TRL_CORECOUNT, .rapl_msrs = RAPL_PKG_ALL | RAPL_DRAM_ALL | RAPL_CORE_ENERGY_STATUS, @@ -5818,11 +5818,6 @@ void process_cpuid() use_c1_residency_msr = 1; } if (is_dnv(family, model)) { - BIC_PRESENT(BIC_CPU_c1); - BIC_NOT_PRESENT(BIC_CPU_c3); - BIC_NOT_PRESENT(BIC_Pkgpc3); - BIC_NOT_PRESENT(BIC_CPU_c7); - BIC_NOT_PRESENT(BIC_Pkgpc7); use_c1_residency_msr = 1; } if (is_skx(family, model) || is_icx(family, model) || is_spr(family, model)) { |