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| author | Asutosh Das <quic_asutoshd@quicinc.com> | 2023-01-13 12:48:50 -0800 |
|---|---|---|
| committer | Martin K. Petersen <martin.petersen@oracle.com> | 2023-01-13 21:03:37 -0500 |
| commit | f87b2c41822aad09aadac31b8ba22c0c0e639eee (patch) | |
| tree | 0acba69679b69ffb8b3497519f15bc00fed6ce2b /include/ufs | |
| parent | c30d8d010b5efd1d526ae94c9fbbfc0f74cec9fe (diff) | |
| download | linux-f87b2c41822aad09aadac31b8ba22c0c0e639eee.tar.gz | |
scsi: ufs: mcq: Add completion support of a CQE
Add support for completing requests from Completion Queue. Some host
controllers support vendor specific registers that provide a bitmap of all
CQs which have at least one completed CQE. Add this support. The MCQ
specification doesn't provide the Task Tag or its equivalent in the
Completion Queue Entry. So use an indirect method to find the Task Tag
from the Completion Queue Entry.
Co-developed-by: Can Guo <quic_cang@quicinc.com>
Signed-off-by: Can Guo <quic_cang@quicinc.com>
Signed-off-by: Asutosh Das <quic_asutoshd@quicinc.com>
Reviewed-by: Bart Van Assche <bvanassche@acm.org>
Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Stanley Chu <stanley.chu@mediatek.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Diffstat (limited to 'include/ufs')
| -rw-r--r-- | include/ufs/ufshcd.h | 7 | ||||
| -rw-r--r-- | include/ufs/ufshci.h | 3 |
2 files changed, 10 insertions, 0 deletions
diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h index 019b8cf23b29b..0dcb104a6713d 100644 --- a/include/ufs/ufshcd.h +++ b/include/ufs/ufshcd.h @@ -304,6 +304,7 @@ struct ufs_pwr_mode_info { * @mcq_config_resource: called to configure MCQ platform resources * @get_hba_mac: called to get vendor specific mac value, mandatory for mcq mode * @op_runtime_config: called to config Operation and runtime regs Pointers + * @get_outstanding_cqs: called to get outstanding completion queues */ struct ufs_hba_variant_ops { const char *name; @@ -346,6 +347,8 @@ struct ufs_hba_variant_ops { int (*mcq_config_resource)(struct ufs_hba *hba); int (*get_hba_mac)(struct ufs_hba *hba); int (*op_runtime_config)(struct ufs_hba *hba); + int (*get_outstanding_cqs)(struct ufs_hba *hba, + unsigned long *ocqs); }; /* clock gating state */ @@ -1081,6 +1084,8 @@ struct ufs_hba { * @id: hardware queue ID * @sq_tp_slot: current slot to which SQ tail pointer is pointing * @sq_lock: serialize submission queue access + * @cq_tail_slot: current slot to which CQ tail pointer is pointing + * @cq_head_slot: current slot to which CQ head pointer is pointing */ struct ufs_hw_queue { void __iomem *mcq_sq_head; @@ -1096,6 +1101,8 @@ struct ufs_hw_queue { u32 id; u32 sq_tail_slot; spinlock_t sq_lock; + u32 cq_tail_slot; + u32 cq_head_slot; }; static inline bool is_mcq_enabled(struct ufs_hba *hba) diff --git a/include/ufs/ufshci.h b/include/ufs/ufshci.h index b6ae5718387c7..eca89f9f6aac1 100644 --- a/include/ufs/ufshci.h +++ b/include/ufs/ufshci.h @@ -263,6 +263,9 @@ enum { /* UTMRLRSR - UTP Task Management Request Run-Stop Register 80h */ #define UTP_TASK_REQ_LIST_RUN_STOP_BIT 0x1 +/* CQISy - CQ y Interrupt Status Register */ +#define UFSHCD_MCQ_CQIS_TAIL_ENT_PUSH_STS 0x1 + /* UICCMD - UIC Command */ #define COMMAND_OPCODE_MASK 0xFF #define GEN_SELECTOR_INDEX_MASK 0xFFFF |