diff options
| author | Dongdong Liu <liudongdong3@huawei.com> | 2022-01-18 17:21:17 +0800 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2022-03-03 12:11:15 -0600 |
| commit | 3dc8a1f6f64481a8a5a669633e880f26dae0d752 (patch) | |
| tree | 7a2066949fec2a7cf7fed46f193d270071bac779 /drivers/pci/setup-bus.c | |
| parent | e783362eb54cd99b2cac8b3a9aeac942e6f6ac07 (diff) | |
| download | linux-3dc8a1f6f64481a8a5a669633e880f26dae0d752.tar.gz | |
PCI: Support BAR sizes up to 8TB
Current kernel reports that BARs larger than 128GB, e.g., this 4TB BAR, are
disabled:
pci 0000:01:00.0: disabling BAR 4: [mem 0x00000000-0x3ffffffffff 64bit pref] (bad alignment 0x40000000000)
Increase the maximum BAR size from 128GB to 8TB for future expansion.
[bhelgaas: commit log]
Link: https://lore.kernel.org/r/20220118092117.10089-1-liudongdong3@huawei.com
Signed-off-by: Dongdong Liu <liudongdong3@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci/setup-bus.c')
| -rw-r--r-- | drivers/pci/setup-bus.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index 547396ec50b59..a7893bf2f5806 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -994,7 +994,7 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask, { struct pci_dev *dev; resource_size_t min_align, align, size, size0, size1; - resource_size_t aligns[18]; /* Alignments from 1MB to 128GB */ + resource_size_t aligns[24]; /* Alignments from 1MB to 8TB */ int order, max_order; struct resource *b_res = find_bus_resource_of_type(bus, mask | IORESOURCE_PREFETCH, type); |