diff options
| author | Sumit Gupta <sumitg@nvidia.com> | 2023-06-21 19:13:58 +0530 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2023-07-25 22:09:36 +0200 |
| commit | b18e525990acb67f214f6b2528fae292ac9cf641 (patch) | |
| tree | 99b331e3eee0d515f9c847ccf0829106401fe573 /drivers/memory | |
| parent | 6d0c4aa516280c3bab82cd3c53d142401eccab26 (diff) | |
| download | linux-b18e525990acb67f214f6b2528fae292ac9cf641.tar.gz | |
memory: tegra: Add clients used by DRM in Tegra234
Add entries for VIC, NVDEC, NVENC, NVJPG memory controller
clients into the 'tegra_234_mc_clients' table.
Signed-off-by: Johnny Liu <johnliu@nvidia.com>
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20230621134400.23070-3-sumitg@nvidia.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Diffstat (limited to 'drivers/memory')
| -rw-r--r-- | drivers/memory/tegra/tegra234.c | 120 |
1 files changed, 120 insertions, 0 deletions
diff --git a/drivers/memory/tegra/tegra234.c b/drivers/memory/tegra/tegra234.c index 84f4d964d8345..7954f339ca793 100644 --- a/drivers/memory/tegra/tegra234.c +++ b/drivers/memory/tegra/tegra234.c @@ -30,6 +30,18 @@ static const struct tegra_mc_client tegra234_mc_clients[] = { }, }, }, { + .id = TEGRA234_MEMORY_CLIENT_NVENCSRD, + .name = "nvencsrd", + .bpmp_id = TEGRA_ICC_BPMP_NVENC, + .type = TEGRA_ICC_NISO, + .sid = TEGRA234_SID_NVENC, + .regs = { + .sid = { + .override = 0xe0, + .security = 0xe4, + }, + }, + }, { .id = TEGRA234_MEMORY_CLIENT_PCIE6AR, .name = "pcie6ar", .bpmp_id = TEGRA_ICC_BPMP_PCIE_6, @@ -66,6 +78,18 @@ static const struct tegra_mc_client tegra234_mc_clients[] = { }, }, }, { + .id = TEGRA234_MEMORY_CLIENT_NVENCSWR, + .name = "nvencswr", + .bpmp_id = TEGRA_ICC_BPMP_NVENC, + .type = TEGRA_ICC_NISO, + .sid = TEGRA234_SID_NVENC, + .regs = { + .sid = { + .override = 0x158, + .security = 0x15c, + }, + }, + }, { .id = TEGRA234_MEMORY_CLIENT_DLA0RDB, .name = "dla0rdb", .sid = TEGRA234_SID_NVDLA0, @@ -358,6 +382,30 @@ static const struct tegra_mc_client tegra234_mc_clients[] = { }, }, }, { + .id = TEGRA234_MEMORY_CLIENT_VICSRD, + .name = "vicsrd", + .bpmp_id = TEGRA_ICC_BPMP_VIC, + .type = TEGRA_ICC_NISO, + .sid = TEGRA234_SID_VIC, + .regs = { + .sid = { + .override = 0x360, + .security = 0x364, + }, + }, + }, { + .id = TEGRA234_MEMORY_CLIENT_VICSWR, + .name = "vicswr", + .bpmp_id = TEGRA_ICC_BPMP_VIC, + .type = TEGRA_ICC_NISO, + .sid = TEGRA234_SID_VIC, + .regs = { + .sid = { + .override = 0x368, + .security = 0x36c, + }, + }, + }, { .id = TEGRA234_MEMORY_CLIENT_DLA1RDB1, .name = "dla0rdb1", .sid = TEGRA234_SID_NVDLA1, @@ -402,6 +450,30 @@ static const struct tegra_mc_client tegra234_mc_clients[] = { }, }, }, { + .id = TEGRA234_MEMORY_CLIENT_NVDECSRD, + .name = "nvdecsrd", + .bpmp_id = TEGRA_ICC_BPMP_NVDEC, + .type = TEGRA_ICC_NISO, + .sid = TEGRA234_SID_NVDEC, + .regs = { + .sid = { + .override = 0x3c0, + .security = 0x3c4, + }, + }, + }, { + .id = TEGRA234_MEMORY_CLIENT_NVDECSWR, + .name = "nvdecswr", + .bpmp_id = TEGRA_ICC_BPMP_NVDEC, + .type = TEGRA_ICC_NISO, + .sid = TEGRA234_SID_NVDEC, + .regs = { + .sid = { + .override = 0x3c8, + .security = 0x3cc, + }, + }, + }, { .id = TEGRA234_MEMORY_CLIENT_APER, .name = "aper", .bpmp_id = TEGRA_ICC_BPMP_APE, @@ -438,6 +510,30 @@ static const struct tegra_mc_client tegra234_mc_clients[] = { }, }, }, { + .id = TEGRA234_MEMORY_CLIENT_NVJPGSRD, + .name = "nvjpgsrd", + .bpmp_id = TEGRA_ICC_BPMP_NVJPG_0, + .type = TEGRA_ICC_NISO, + .sid = TEGRA234_SID_NVJPG, + .regs = { + .sid = { + .override = 0x3f0, + .security = 0x3f4, + }, + }, + }, { + .id = TEGRA234_MEMORY_CLIENT_NVJPGSWR, + .name = "nvjpgswr", + .bpmp_id = TEGRA_ICC_BPMP_NVJPG_0, + .type = TEGRA_ICC_NISO, + .sid = TEGRA234_SID_NVJPG, + .regs = { + .sid = { + .override = 0x3f8, + .security = 0x3fc, + }, + }, + }, { .id = TEGRA234_MEMORY_CLIENT_NVDISPLAYR, .name = "nvdisplayr", .bpmp_id = TEGRA_ICC_BPMP_DISPLAY, @@ -782,6 +878,30 @@ static const struct tegra_mc_client tegra234_mc_clients[] = { }, }, }, { + .id = TEGRA234_MEMORY_CLIENT_NVJPG1SRD, + .name = "nvjpg1srd", + .bpmp_id = TEGRA_ICC_BPMP_NVJPG_1, + .type = TEGRA_ICC_NISO, + .sid = TEGRA234_SID_NVJPG1, + .regs = { + .sid = { + .override = 0x918, + .security = 0x91c, + }, + }, + }, { + .id = TEGRA234_MEMORY_CLIENT_NVJPG1SWR, + .name = "nvjpg1swr", + .bpmp_id = TEGRA_ICC_BPMP_NVJPG_1, + .type = TEGRA_ICC_NISO, + .sid = TEGRA234_SID_NVJPG1, + .regs = { + .sid = { + .override = 0x920, + .security = 0x924, + }, + }, + }, { .id = TEGRA_ICC_MC_CPU_CLUSTER0, .name = "sw_cluster0", .bpmp_id = TEGRA_ICC_BPMP_CPU_CLUSTER0, |