diff options
author | James Clark <james.clark@arm.com> | 2022-03-04 17:19:10 +0000 |
---|---|---|
committer | Mathieu Poirier <mathieu.poirier@linaro.org> | 2022-04-13 11:05:43 -0600 |
commit | 66192082e78a9d346eefd05c0539d31ab45757f9 (patch) | |
tree | 86b4384bfa115e8bb0969f06359287dcf5d08760 /drivers/hwtracing | |
parent | 0544f32b717972cc4d080c02461e0cd0432566d7 (diff) | |
download | linux-66192082e78a9d346eefd05c0539d31ab45757f9.tar.gz |
coresight: etm4x: Cleanup TRCSSPCICRn register accesses
This is a no-op change for style and consistency and has no effect on
the binary output by the compiler. In sysreg.h fields are defined as
the register name followed by the field name and then _MASK. This
allows for grepping for fields by name rather than using magic numbers.
Signed-off-by: James Clark <james.clark@arm.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Link: https://lore.kernel.org/r/20220304171913.2292458-14-james.clark@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Diffstat (limited to 'drivers/hwtracing')
-rw-r--r-- | drivers/hwtracing/coresight/coresight-etm4x-sysfs.c | 2 | ||||
-rw-r--r-- | drivers/hwtracing/coresight/coresight-etm4x.h | 2 |
2 files changed, 3 insertions, 1 deletions
diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c index 7dd7636fc2a7b..25f76a656308e 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c @@ -1842,7 +1842,7 @@ static ssize_t sshot_pe_ctrl_store(struct device *dev, spin_lock(&drvdata->spinlock); idx = config->ss_idx; - config->ss_pe_cmp[idx] = val & GENMASK(7, 0); + config->ss_pe_cmp[idx] = FIELD_PREP(TRCSSPCICRn_PC_MASK, val); /* must clear bit 31 in related status register on programming */ config->ss_status[idx] &= ~TRCSSCSRn_STATUS; spin_unlock(&drvdata->spinlock); diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h index b4217eaab4505..3b81c104a44b0 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.h +++ b/drivers/hwtracing/coresight/coresight-etm4x.h @@ -218,6 +218,8 @@ #define TRCSSCSRn_STATUS BIT(31) #define TRCSSCCRn_SAC_ARC_RST_MASK GENMASK(24, 0) +#define TRCSSPCICRn_PC_MASK GENMASK(7, 0) + /* * System instructions to access ETM registers. * See ETMv4.4 spec ARM IHI0064F section 4.3.6 System instructions |