diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2005-05-09 13:16:07 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2005-10-29 19:31:13 +0100 |
| commit | 1d74f6bc85cbdc4601e5aea1e67ccbd259f0c7f4 (patch) | |
| tree | e9ffdef4000ab6e45a5d4c9233da0a7a67daf285 /arch | |
| parent | d547c5cc2186be9d74b0c595dc8059aef56cd445 (diff) | |
| download | linux-1d74f6bc85cbdc4601e5aea1e67ccbd259f0c7f4.tar.gz | |
__compute_return_epc() uses CFC1 instruction which might result in a
coprocessor unusable exception since the process can lose its fpu
context by preemption.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/kernel/branch.c | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c index 01117e977a7fbb..56aea5f526a7db 100644 --- a/arch/mips/kernel/branch.c +++ b/arch/mips/kernel/branch.c @@ -12,6 +12,7 @@ #include <asm/branch.h> #include <asm/cpu.h> #include <asm/cpu-features.h> +#include <asm/fpu.h> #include <asm/inst.h> #include <asm/ptrace.h> #include <asm/uaccess.h> @@ -161,10 +162,13 @@ int __compute_return_epc(struct pt_regs *regs) * And now the FPA/cp1 branch instructions. */ case cop1_op: - if (!cpu_has_fpu) - fcr31 = current->thread.fpu.soft.fcr31; - else + preempt_disable(); + if (is_fpu_owner()) asm volatile("cfc1\t%0,$31" : "=r" (fcr31)); + else + fcr31 = current->thread.fpu.hard.fcr31; + preempt_enable(); + bit = (insn.i_format.rt >> 2); bit += (bit != 0); bit += 23; |