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authorCristian Ciocaltea <cristian.ciocaltea@collabora.com>2023-12-20 23:17:42 +0200
committerConor Dooley <conor.dooley@microchip.com>2024-01-31 12:23:26 +0000
commit2db68ddbf33a76b5913ca281660979b4c48f1df6 (patch)
tree34886b3c7ef7b6e8035074cd5bdaaff4bc9a4f4a /arch/riscv
parente16d3dc0a2d7cd7bd673ce08b39a4239aafe0938 (diff)
downloadlinux-2db68ddbf33a76b5913ca281660979b4c48f1df6.tar.gz
riscv: dts: starfive: beaglev-starlight: Setup phy reset gpio
The BeagleV Starlight SBC uses a Microchip KSZ9031RNXCA PHY supporting RGMII-ID which doesn't require any particular setup, other than defining a reset gpio, as opposed to VisionFive V1 for which the RX internal delay had to be adjusted. Co-developed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Reviewed-by: Jacob Keller <jacob.e.keller@intel.com> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'arch/riscv')
-rw-r--r--arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts b/arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts
index 7cda3a89020a4..168f5d9895a9d 100644
--- a/arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts
+++ b/arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts
@@ -11,3 +11,14 @@
model = "BeagleV Starlight Beta";
compatible = "beagle,beaglev-starlight-jh7100-r0", "starfive,jh7100";
};
+
+&gmac {
+ phy-handle = <&phy>;
+};
+
+&mdio {
+ phy: ethernet-phy@7 {
+ reg = <7>;
+ reset-gpios = <&gpio 63 GPIO_ACTIVE_LOW>;
+ };
+};