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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2006-07-04 14:16:28 +1000
committerPaul Mackerras <paulus@samba.org>2006-07-07 20:19:15 +1000
commit26c5032eaa64090b2a01973b0c6ea9e7f6a80fa7 (patch)
tree61cde3e5c0c5c7fe3e0cf89be2f2d5d1b9d35379 /arch/powerpc/platforms/chrp/pci.c
parentf704b8d1f080ee71b7a9a88bcf585e7dd4272f4b (diff)
downloadlinux-26c5032eaa64090b2a01973b0c6ea9e7f6a80fa7.tar.gz
[POWERPC] Add briq support to CHRP
The support for Briq machines has been floating around as patches for ages. This cleans it up and adds it once for all. Some of this is based on initial code provided by Karsten Jeppesen <karsten@jeppesens.com> and mostly rewritten from scratch by me. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/platforms/chrp/pci.c')
-rw-r--r--arch/powerpc/platforms/chrp/pci.c42
1 files changed, 38 insertions, 4 deletions
diff --git a/arch/powerpc/platforms/chrp/pci.c b/arch/powerpc/platforms/chrp/pci.c
index 6802cdc3168a1..6d7ac649b45e8 100644
--- a/arch/powerpc/platforms/chrp/pci.c
+++ b/arch/powerpc/platforms/chrp/pci.c
@@ -257,7 +257,7 @@ chrp_find_bridges(void)
else
printk(KERN_INFO "PCI buses %d..%d",
bus_range[0], bus_range[1]);
- printk(" controlled by %s", dev->type);
+ printk(" controlled by %s", dev->full_name);
if (!is_longtrail)
printk(" at %llx", (unsigned long long)r.start);
printk("\n");
@@ -289,6 +289,19 @@ chrp_find_bridges(void)
setup_indirect_pci(hose, 0xfec00cf8, 0xfee00cfc);
} else if (is_pegasos == 2) {
setup_peg2(hose, dev);
+ } else if (!strncmp(model, "IBM,CPC710", 10)) {
+ setup_indirect_pci(hose,
+ r.start + 0x000f8000,
+ r.start + 0x000f8010);
+ if (index == 0) {
+ dma = get_property(dev, "system-dma-base",&len);
+ if (dma && len >= sizeof(*dma)) {
+ dma = (unsigned int *)
+ (((unsigned long)dma) +
+ len - sizeof(*dma));
+ pci_dram_offset = *dma;
+ }
+ }
} else {
printk("No methods for %s (model %s), using RTAS\n",
dev->full_name, model);
@@ -306,8 +319,29 @@ chrp_find_bridges(void)
printk("pci_dram_offset = %lx\n", pci_dram_offset);
}
}
+}
+
+/* SL82C105 IDE Control/Status Register */
+#define SL82C105_IDECSR 0x40
+
+/* Fixup for Winbond ATA quirk, required for briq */
+void chrp_pci_fixup_winbond_ata(struct pci_dev *sl82c105)
+{
+ u8 progif;
- /* Do not fixup interrupts from OF tree on pegasos */
- if (is_pegasos)
- ppc_md.pcibios_fixup = NULL;
+ /* If non-briq machines need that fixup too, please speak up */
+ if (!machine_is(chrp) || _chrp_type != _CHRP_briq)
+ return;
+
+ if ((sl82c105->class & 5) != 5) {
+ printk("W83C553: Switching SL82C105 IDE to PCI native mode\n");
+ /* Enable SL82C105 PCI native IDE mode */
+ pci_read_config_byte(sl82c105, PCI_CLASS_PROG, &progif);
+ pci_write_config_byte(sl82c105, PCI_CLASS_PROG, progif | 0x05);
+ sl82c105->class |= 0x05;
+ /* Disable SL82C105 second port */
+ pci_write_config_word(sl82c105, SL82C105_IDECSR, 0x0003);
+ }
}
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105,
+ chrp_pci_fixup_winbond_ata);