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authorArınç ÜNAL <arinc.unal@arinc9.com>2023-09-17 13:37:53 +0300
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>2023-10-06 10:12:32 +0200
commitb44ae980e9d026c41101d97cf96c0eb09d490b35 (patch)
treee858323673b67693477c6b4e46aa2c27d026ecaa /arch/mips
parent04318868abaa82f7c6e9e0ce323aa5460b7fc9da (diff)
downloadlinux-b44ae980e9d026c41101d97cf96c0eb09d490b35.tar.gz
mips: dts: ralink: mt7621: define each reset as an item
Each item of the resets property should define a reset. Split the item with two resets on the ethernet node into two separate items. Sort the items of the clocks property to the same line as a trivial change. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/boot/dts/ralink/mt7621.dtsi5
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
index 7caed0d14f11a..35a10258f2357 100644
--- a/arch/mips/boot/dts/ralink/mt7621.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
@@ -300,14 +300,13 @@
compatible = "mediatek,mt7621-eth";
reg = <0x1e100000 0x10000>;
- clocks = <&sysc MT7621_CLK_FE>,
- <&sysc MT7621_CLK_ETH>;
+ clocks = <&sysc MT7621_CLK_FE>, <&sysc MT7621_CLK_ETH>;
clock-names = "fe", "ethif";
#address-cells = <1>;
#size-cells = <0>;
- resets = <&sysc MT7621_RST_FE &sysc MT7621_RST_ETH>;
+ resets = <&sysc MT7621_RST_FE>, <&sysc MT7621_RST_ETH>;
reset-names = "fe", "eth";
interrupt-parent = <&gic>;