diff options
author | Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> | 2021-02-09 15:09:44 +0200 |
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committer | Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> | 2021-10-06 08:48:32 +0300 |
commit | 11d0e430af60c3f0bf4a65ceaa4b531f5c0cd7cb (patch) | |
tree | 5da54e7ca732260902b1977f527157391b22df61 | |
parent | 540e5a3885b1e2c0e55f4fe225deea377ac86022 (diff) | |
download | linux-dt-multistream-v9.tar.gz |
Add AM654x EVM FPDLink overlaymultistream-v9
Add overlays for AM6 based fpdlink setup.
k3-am654-evm-fpdlink-ub960-evm is the base overlay, adding UB960 EVM
support.
k3-am654-evm-fpdlink-ZZZ-X are additional overlays, adding camera ZZZ to
RX port X of UB960.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
-rw-r--r-- | Makefile | 1 | ||||
-rw-r--r-- | arch/arm64/boot/dts/ti/k3-am654-evm-fpdlink-ov10635-0.dtso | 110 | ||||
-rw-r--r-- | arch/arm64/boot/dts/ti/k3-am654-evm-fpdlink-ov10635-1.dtso | 110 | ||||
-rw-r--r-- | arch/arm64/boot/dts/ti/k3-am654-evm-fpdlink-ub960-evm.dtso | 85 |
4 files changed, 306 insertions, 0 deletions
@@ -134,6 +134,7 @@ dtb-tests-arm64 := \ ti/k3-am654-base-board.dtb,ti/k3-am654-evm-oldi-lcd1evm.dtbo \ ti/k3-am654-base-board.dtb,ti/k3-am654-evm-tc358876.dtbo \ ti/k3-am654-base-board.dtb,ti/k3-am654-evm-ov5640.dtbo \ + ti/k3-am654-base-board.dtb,ti/k3-am654-evm-fpdlink-ub960-evm.dtbo,ti/k3-am654-evm-fpdlink-ov10635-0.dtbo,ti/k3-am654-evm-fpdlink-ov10635-1.dtbo \ ti/k3-am654-base-board.dtb,ti/k3-am654-pcie-usb2.dtbo \ ti/k3-am654-base-board.dtb,ti/k3-am654-pcie-usb3.dtbo \ ti/k3-am654-base-board.dtb,ti/k3-am654-idk.dtbo diff --git a/arch/arm64/boot/dts/ti/k3-am654-evm-fpdlink-ov10635-0.dtso b/arch/arm64/boot/dts/ti/k3-am654-evm-fpdlink-ov10635-0.dtso new file mode 100644 index 0000000..b928aa5 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am654-evm-fpdlink-ov10635-0.dtso @@ -0,0 +1,110 @@ +// SPDX-License-Identifier: GPL-2.0 +/** + * OV10635 FPD-Link 3 Camera Module + * + * Copyright (c) 2021 Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> + */ + +/dts-v1/; +/plugin/; + +#include <dt-bindings/gpio/gpio.h> + +/ { + fragment@101 { + target-path = "/"; + + __overlay__ { + clk_cam_module_48M_fixed: fixed-clock-0-48M { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <48000000>; + }; + + clk_cam_24M: fixed-clock-0-24M { + compatible = "fixed-factor-clock"; + clocks = <&clk_cam_module_48M_fixed>; + #clock-cells = <0>; + clock-div = <2>; + clock-mult = <1>; + }; + }; + }; +}; + +&ds90ub960_ports { + #address-cells = <1>; + #size-cells = <0>; + + /* FPDLink RX 0 */ + port@0 { + reg = <0>; + ds90ub960_fpd3_in: endpoint { + remote-endpoint = <&ub913_out>; + + serializer: remote-chip { + compatible = "ti,ds90ub913a-q1"; + + gpio-controller; + #gpio-cells = <2>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + ub913_in: endpoint@0 { + remote-endpoint = <&sensor_out>; + }; + }; + + port@1 { + reg = <1>; + + ub913_out: endpoint@0 { + remote-endpoint = <&ds90ub960_fpd3_in>; + }; + }; + }; + }; + }; + }; +}; + +&ds90ub960_atr { + #address-cells = <1>; + #size-cells = <0>; + + i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + sensor@30 { + compatible = "ovti,ov10635"; + reg = <0x30>; + + clocks = <&clk_cam_24M>; + clock-names = "xvclk"; + + powerdown-gpios = <&serializer 0 GPIO_ACTIVE_HIGH>; + + /* Note: PCLK must be 96MHz */ + + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + sensor_out: endpoint { + remote-endpoint = <&ub913_in>; + hsync-active = <1>; + vsync-active = <1>; + pclk-sample = <0>; + bus-width = <10>; + }; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am654-evm-fpdlink-ov10635-1.dtso b/arch/arm64/boot/dts/ti/k3-am654-evm-fpdlink-ov10635-1.dtso new file mode 100644 index 0000000..3774df7 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am654-evm-fpdlink-ov10635-1.dtso @@ -0,0 +1,110 @@ +// SPDX-License-Identifier: GPL-2.0 +/** + * OV10635 FPD-Link 3 Camera Module + * + * Copyright (c) 2021 Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> + */ + +/dts-v1/; +/plugin/; + +#include <dt-bindings/gpio/gpio.h> + +/ { + fragment@101 { + target-path = "/"; + + __overlay__ { + clk_cam_module_48M_fixed: fixed-clock-1-48M { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <48000000>; + }; + + clk_cam_24M: fixed-clock-1-24M { + compatible = "fixed-factor-clock"; + clocks = <&clk_cam_module_48M_fixed>; + #clock-cells = <0>; + clock-div = <2>; + clock-mult = <1>; + }; + }; + }; +}; + +&ds90ub960_ports { + #address-cells = <1>; + #size-cells = <0>; + + /* FPDLink RX 1 */ + port@1 { + reg = <1>; + ds90ub960_fpd3_in: endpoint { + remote-endpoint = <&ub913_out>; + + serializer: remote-chip { + compatible = "ti,ds90ub913a-q1"; + + gpio-controller; + #gpio-cells = <2>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + ub913_in: endpoint@0 { + remote-endpoint = <&sensor_out>; + }; + }; + + port@1 { + reg = <1>; + + ub913_out: endpoint@0 { + remote-endpoint = <&ds90ub960_fpd3_in>; + }; + }; + }; + }; + }; + }; +}; + +&ds90ub960_atr { + #address-cells = <1>; + #size-cells = <0>; + + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + sensor@30 { + compatible = "ovti,ov10635"; + reg = <0x30>; + + clocks = <&clk_cam_24M>; + clock-names = "xvclk"; + + powerdown-gpios = <&serializer 0 GPIO_ACTIVE_HIGH>; + + /* Note: PCLK must be 96MHz */ + + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + sensor_out: endpoint { + remote-endpoint = <&ub913_in>; + hsync-active = <1>; + vsync-active = <1>; + pclk-sample = <0>; + bus-width = <10>; + }; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am654-evm-fpdlink-ub960-evm.dtso b/arch/arm64/boot/dts/ti/k3-am654-evm-fpdlink-ub960-evm.dtso new file mode 100644 index 0000000..4a743a2 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am654-evm-fpdlink-ub960-evm.dtso @@ -0,0 +1,85 @@ +// SPDX-License-Identifier: GPL-2.0 +/** + * UB960 EVM for AM654-EVM. + * + * Copyright (c) 2021 Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> + */ + +/dts-v1/; +/plugin/; + +#include <dt-bindings/gpio/gpio.h> + +/ { + fragment@101 { + target-path = "/"; + + __overlay__ { + clk_ub960_evm_25M_fixed: clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; + }; + }; +}; + +&main_i2c1 { + #address-cells = <1>; + #size-cells = <0>; + + clock-frequency = <400000>; + + deser@3d { + compatible = "ti,ds90ub960-q1"; + + reg-names = "main", "ser0", "ser1", "ser2", "ser3"; + reg = <0x3d>, <0x44>, <0x45>, <0x46>, <0x47>; + + clocks = <&clk_ub960_evm_25M_fixed>; + + /* GPIO_CSI_RESETn */ + powerdown-gpios = <&pca9555 7 GPIO_ACTIVE_LOW>; + + i2c-alias-pool = /bits/ 16 <0x4a 0x4b 0x4c 0x4d 0x4e 0x4f>; + + data-rate = <1600000000>; + + ds90ub960_ports: ports { + #address-cells = <1>; + #size-cells = <0>; + + /* CSI-2 */ + port@4 { + reg = <4>; + ds90ub960_mipi_out0: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&csi2_phy0>; + }; + }; + }; + + ds90ub960_atr: i2c-atr { + #address-cells = <1>; + #size-cells = <0>; + }; + }; +}; + +&cal { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + csi2_phy0: endpoint { + remote-endpoint = <&ds90ub960_mipi_out0>; + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + }; + }; + }; +}; |