diff options
| author | Greg Ungerer <gerg@snapgear.com> | 2005-01-09 15:58:41 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-01-09 15:58:41 -0800 |
| commit | f800b0c06dad3b39c205ba6289560e55ffced15e (patch) | |
| tree | a9f70300e14a5bfc5b96b25f6c5fe811c41c7818 /include | |
| parent | e6cd81eb2a3554a5d5a80cf50adb65976ed9b1a4 (diff) | |
| download | history-f800b0c06dad3b39c205ba6289560e55ffced15e.tar.gz | |
[PATCH] m68knommu: definitions for the SDRAM registers on the ColdFire 528x CPU's
Add definitions for the SDRAM configuration registers on the 528x
ColdFire CPU's.
Signed-off-by: Greg Ungerer <gerg@snapgear.com>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-m68knommu/m528xsim.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/include/asm-m68knommu/m528xsim.h b/include/asm-m68knommu/m528xsim.h index bc91a4bf5458ff..371993a206acdc 100644 --- a/include/asm-m68knommu/m528xsim.h +++ b/include/asm-m68knommu/m528xsim.h @@ -32,5 +32,14 @@ #define MCFINT_UART0 13 /* Interrupt number for UART0 */ #define MCFINT_PIT1 55 /* Interrupt number for PIT1 */ +/* + * SDRAM configuration registers. + */ +#define MCFSIM_DCR 0x44 /* SDRAM control */ +#define MCFSIM_DACR0 0x48 /* SDRAM base address 0 */ +#define MCFSIM_DMR0 0x4c /* SDRAM address mask 0 */ +#define MCFSIM_DACR1 0x50 /* SDRAM base address 1 */ +#define MCFSIM_DMR1 0x54 /* SDRAM address mask 1 */ + /****************************************************************************/ #endif /* m528xsim_h */ |