diff options
author | Ben Dooks <ben-linux@org.rmk.(none)> | 2004-08-14 19:03:04 +0100 |
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committer | Russell King <rmk@flint.arm.linux.org.uk> | 2004-08-14 19:03:04 +0100 |
commit | 10c37e7c8e8976f1504dc7fcc19f52b6d80c8b53 (patch) | |
tree | 4d89faed9c7b8296626709bf1944edb26af7f787 /include | |
parent | 9c496bde802b19db40325bbde356be62e66dc125 (diff) | |
download | history-10c37e7c8e8976f1504dc7fcc19f52b6d80c8b53.tar.gz |
[ARM PATCH] 1995/1: S3C2410 - Clock controls
Patch from Ben Dooks
Code to deal with controlling the clock sources
on the s3c2410, using the <arch/hardware/clocks.h>
interface
Includes Herbert Potzl's patch for the clock register
include file
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-arm/arch-s3c2410/regs-clock.h | 25 |
1 files changed, 22 insertions, 3 deletions
diff --git a/include/asm-arm/arch-s3c2410/regs-clock.h b/include/asm-arm/arch-s3c2410/regs-clock.h index a82d55cc6f08a9..f3f090525d052d 100644 --- a/include/asm-arm/arch-s3c2410/regs-clock.h +++ b/include/asm-arm/arch-s3c2410/regs-clock.h @@ -1,6 +1,6 @@ /* linux/include/asm/arch-s3c2410/regs-clock.h * - * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk> + * Copyright (c) 2003,2004 Simtec Electronics <linux@simtec.co.uk> * http://www.simtec.co.uk/products/SWLINUX/ * * This program is free software; you can redistribute it and/or modify @@ -10,8 +10,9 @@ * S3C2410 clock register definitions * * Changelog: - * 19-06-2003 BJD Created file - * 12-03-2004 BJD Updated include protection + * 08-Aug-2004 Herbert Pötzl Added CLKCON definitions + * 19-06-2003 Ben Dooks Created file + * 12-03-2004 Ben Dooks Updated include protection */ @@ -30,6 +31,24 @@ #define S3C2410_CLKSLOW S3C2410_CLKREG(0x10) #define S3C2410_CLKDIVN S3C2410_CLKREG(0x14) +#define S3C2410_CLKCON_IDLE (1<<2) +#define S3C2410_CLKCON_POWER (1<<3) +#define S3C2410_CLKCON_NAND (1<<4) +#define S3C2410_CLKCON_LCDC (1<<5) +#define S3C2410_CLKCON_USBH (1<<6) +#define S3C2410_CLKCON_USBD (1<<7) +#define S3C2410_CLKCON_PWMT (1<<8) +#define S3C2410_CLKCON_SDI (1<<9) +#define S3C2410_CLKCON_UART0 (1<<10) +#define S3C2410_CLKCON_UART1 (1<<11) +#define S3C2410_CLKCON_UART2 (1<<12) +#define S3C2410_CLKCON_GPIO (1<<13) +#define S3C2410_CLKCON_RTC (1<<14) +#define S3C2410_CLKCON_ADC (1<<15) +#define S3C2410_CLKCON_IIC (1<<16) +#define S3C2410_CLKCON_IIS (1<<17) +#define S3C2410_CLKCON_SPI (1<<18) + #define S3C2410_PLLCON_MDIVSHIFT 12 #define S3C2410_PLLCON_PDIVSHIFT 4 #define S3C2410_PLLCON_SDIVSHIFT 0 |