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authorDavid S. Miller <davem@nuts.davemloft.net>2005-01-09 05:14:10 -0800
committerDavid S. Miller <davem@nuts.davemloft.net>2005-01-09 05:14:10 -0800
commitf07143f53a5fab1d07637a063b9479ae2c3092bf (patch)
tree04a4f0a2d6092265fa1a2c31a91d6f7b042102e8 /drivers
parent11d7829025bddd70d592061728e62e0419de0349 (diff)
parente093407dfb2d957d0055528d6d198e191296eb71 (diff)
downloadhistory-f07143f53a5fab1d07637a063b9479ae2c3092bf.tar.gz
Merge nuts.davemloft.net:/disk1/BK/network-2.6
into nuts.davemloft.net:/disk1/BK/net-2.6
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/tg3.c22
1 files changed, 13 insertions, 9 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index b39435b32f8a4e..8a165aca75428c 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -60,8 +60,8 @@
#define DRV_MODULE_NAME "tg3"
#define PFX DRV_MODULE_NAME ": "
-#define DRV_MODULE_VERSION "3.14"
-#define DRV_MODULE_RELDATE "November 15, 2004"
+#define DRV_MODULE_VERSION "3.15"
+#define DRV_MODULE_RELDATE "January 6, 2005"
#define TG3_DEF_MAC_MODE 0
#define TG3_DEF_RX_MODE 0
@@ -493,7 +493,8 @@ static void tg3_switch_clocks(struct tg3 *tp)
static int tg3_readphy(struct tg3 *tp, int reg, u32 *val)
{
u32 frame_val;
- int loops, ret;
+ unsigned int loops;
+ int ret;
if ((tp->mi_mode & MAC_MI_MODE_AUTO_POLL) != 0) {
tw32_f(MAC_MI_MODE,
@@ -501,7 +502,7 @@ static int tg3_readphy(struct tg3 *tp, int reg, u32 *val)
udelay(80);
}
- *val = 0xffffffff;
+ *val = 0x0;
frame_val = ((PHY_ADDR << MI_COM_PHY_ADDR_SHIFT) &
MI_COM_PHY_ADDR_MASK);
@@ -512,7 +513,7 @@ static int tg3_readphy(struct tg3 *tp, int reg, u32 *val)
tw32_f(MAC_MI_COM, frame_val);
loops = PHY_BUSY_LOOPS;
- while (loops-- > 0) {
+ while (loops != 0) {
udelay(10);
frame_val = tr32(MAC_MI_COM);
@@ -521,10 +522,11 @@ static int tg3_readphy(struct tg3 *tp, int reg, u32 *val)
frame_val = tr32(MAC_MI_COM);
break;
}
+ loops -= 1;
}
ret = -EBUSY;
- if (loops > 0) {
+ if (loops != 0) {
*val = frame_val & MI_COM_DATA_MASK;
ret = 0;
}
@@ -540,7 +542,8 @@ static int tg3_readphy(struct tg3 *tp, int reg, u32 *val)
static int tg3_writephy(struct tg3 *tp, int reg, u32 val)
{
u32 frame_val;
- int loops, ret;
+ unsigned int loops;
+ int ret;
if ((tp->mi_mode & MAC_MI_MODE_AUTO_POLL) != 0) {
tw32_f(MAC_MI_MODE,
@@ -558,7 +561,7 @@ static int tg3_writephy(struct tg3 *tp, int reg, u32 val)
tw32_f(MAC_MI_COM, frame_val);
loops = PHY_BUSY_LOOPS;
- while (loops-- > 0) {
+ while (loops != 0) {
udelay(10);
frame_val = tr32(MAC_MI_COM);
if ((frame_val & MI_COM_BUSY) == 0) {
@@ -566,10 +569,11 @@ static int tg3_writephy(struct tg3 *tp, int reg, u32 val)
frame_val = tr32(MAC_MI_COM);
break;
}
+ loops -= 1;
}
ret = -EBUSY;
- if (loops > 0)
+ if (loops != 0)
ret = 0;
if ((tp->mi_mode & MAC_MI_MODE_AUTO_POLL) != 0) {