diff options
| author | Jesse Barnes <jbarnes@sgi.com> | 2005-01-10 23:47:04 -0800 |
|---|---|---|
| committer | Tony Luck <tony.luck@intel.com> | 2005-01-10 23:47:04 -0800 |
| commit | f00fb0ec1d7b4bcfcc404e8edef5dcc77ebff0db (patch) | |
| tree | 342f42524a3fa4d37981f1a04e0f790f4c2db874 /arch | |
| parent | 813ee3b2ce58f858e7e5f25e8f41f3a6aea109c6 (diff) | |
| download | history-f00fb0ec1d7b4bcfcc404e8edef5dcc77ebff0db.tar.gz | |
[IA64] clear all region registers at boot
If we initialize *all* of the region registers to be non-identity mapped we
can catch a few more bugs that might be covered up by whatever their previous
state was. This patch sets them all up to use VHPT (i.e. non alt-tlb)
address translation. It already helped me find one bug in the sn2
initialization code.
Signed-off-by: Jesse Barnes <jbarnes@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/ia64/kernel/head.S | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/ia64/kernel/head.S b/arch/ia64/kernel/head.S index f2ea1ad67cb757..cac7feb93f41db 100644 --- a/arch/ia64/kernel/head.S +++ b/arch/ia64/kernel/head.S @@ -65,10 +65,27 @@ start_ap: ;; /* * Initialize kernel region registers: + * rr[0]: VHPT enabled, page size = PAGE_SHIFT + * rr[1]: VHPT enabled, page size = PAGE_SHIFT + * rr[2]: VHPT enabled, page size = PAGE_SHIFT + * rr[3]: VHPT enabled, page size = PAGE_SHIFT + * rr[4]: VHPT enabled, page size = PAGE_SHIFT * rr[5]: VHPT enabled, page size = PAGE_SHIFT * rr[6]: VHPT disabled, page size = IA64_GRANULE_SHIFT * rr[7]: VHPT disabled, page size = IA64_GRANULE_SHIFT + * We initialize all of them to prevent inadvertently assuming + * something about the state of address translation early in boot. */ + mov r6=((ia64_rid(IA64_REGION_ID_KERNEL, (0<<61)) << 8) | (PAGE_SHIFT << 2) | 1) + movl r7=(0<<61) + mov r8=((ia64_rid(IA64_REGION_ID_KERNEL, (1<<61)) << 8) | (PAGE_SHIFT << 2) | 1) + movl r9=(1<<61) + mov r10=((ia64_rid(IA64_REGION_ID_KERNEL, (2<<61)) << 8) | (PAGE_SHIFT << 2) | 1) + movl r11=(2<<61) + mov r12=((ia64_rid(IA64_REGION_ID_KERNEL, (3<<61)) << 8) | (PAGE_SHIFT << 2) | 1) + movl r13=(3<<61) + mov r14=((ia64_rid(IA64_REGION_ID_KERNEL, (4<<61)) << 8) | (PAGE_SHIFT << 2) | 1) + movl r15=(4<<61) mov r16=((ia64_rid(IA64_REGION_ID_KERNEL, (5<<61)) << 8) | (PAGE_SHIFT << 2) | 1) movl r17=(5<<61) mov r18=((ia64_rid(IA64_REGION_ID_KERNEL, (6<<61)) << 8) | (IA64_GRANULE_SHIFT << 2)) @@ -76,6 +93,11 @@ start_ap: mov r20=((ia64_rid(IA64_REGION_ID_KERNEL, (7<<61)) << 8) | (IA64_GRANULE_SHIFT << 2)) movl r21=(7<<61) ;; + mov rr[r7]=r6 + mov rr[r9]=r8 + mov rr[r11]=r10 + mov rr[r13]=r12 + mov rr[r15]=r14 mov rr[r17]=r16 mov rr[r19]=r18 mov rr[r21]=r20 |