diff options
author | Dave Jones <davej@redhat.com> | 2005-01-14 06:07:22 -0500 |
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committer | Dave Jones <davej@redhat.com> | 2005-01-14 06:07:22 -0500 |
commit | d16b8209f518d5635057163bdfc3bcaabd0194a7 (patch) | |
tree | 46f7d46c8edd9b4a2963ef04df187b5f1f244260 /arch | |
parent | 4e1e90fa3ac6a88102160a4b9b5a111fb3098e5a (diff) | |
download | history-d16b8209f518d5635057163bdfc3bcaabd0194a7.tar.gz |
[CPUFREQ] speedstep-centrino: don't loop on transient MSR
From: "Pallipadi, Venkatesh" <venkatesh.pallipadi@intel.com>
The transient MSR values are for very short duration and so I feel reading
out the last set frequency is better than looping until reading something
expected.
Signed-off-by: Dominik Brodowski <linux@brodo.de>
Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Dave Jones <davej@redhat.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c | 21 |
1 files changed, 4 insertions, 17 deletions
diff --git a/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c b/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c index 2dfa9b16ddb7da..ce426b8eb43232 100644 --- a/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c +++ b/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c @@ -332,24 +332,11 @@ static unsigned int get_cur_freq(unsigned int cpu) /* * On some CPUs, we can see transient MSR values (which are * not present in _PSS), while CPU is doing some automatic - * P-state transition (like TM2). Allow CPU to stabilize at - * some freq and retry. - * If we continue to see transients for long time, just return - * the lowest possible frequency as best guess. + * P-state transition (like TM2). Get the last freq set + * in PERF_CTL. */ - int retries = 0; -#define MAX_EXTRACT_CLOCK_RETRIES 5 - while (clock_freq == 0 && retries < MAX_EXTRACT_CLOCK_RETRIES) { - udelay(100); - retries++; - rdmsr(MSR_IA32_PERF_STATUS, l, h); - clock_freq = extract_clock(l, cpu, 0); - } - - if (clock_freq == 0) { - rdmsr(MSR_IA32_PERF_STATUS, l, h); - clock_freq = extract_clock(l, cpu, 1); - } + rdmsr(MSR_IA32_PERF_CTL, l, h); + clock_freq = extract_clock(l, cpu, 1); } set_cpus_allowed(current, saved_mask); |