5.15-stable patches

added patches:
	arm64-dts-rockchip-enable-internal-pull-up-for-q7_thrm-on-rk3399-puma.patch
	drm-amdgpu-fix-leak-when-gpu-memory-allocation-fails.patch
	drm-amdgpu-sdma5.2-use-legacy-hdp-flush-for-sdma2-3.patch

4 files changed, 136 insertions, 0 deletions

diff --git a/queue-5.15/arm64-dts-rockchip-enable-internal-pull-up-for-q7_thrm-on-rk3399-puma.patch b/queue-5.15/arm64-dts-rockchip-enable-internal-pull-up-for-q7_thrm-on-rk3399-puma.patch
new file mode 100644
index 0000000000..97149786c7
--- /dev/null
+++ b/queue-5.15/arm64-dts-rockchip-enable-internal-pull-up-for-q7_thrm-on-rk3399-puma.patch
@@ -0,0 +1,45 @@
+From 0ac417b8f124427c90ec8c2ef4f632b821d924cc Mon Sep 17 00:00:00 2001
+From: Iskander Amara <iskander.amara@theobroma-systems.com>
+Date: Fri, 8 Mar 2024 09:52:42 +0100
+Subject: arm64: dts: rockchip: enable internal pull-up for Q7_THRM# on RK3399 Puma
+
+From: Iskander Amara <iskander.amara@theobroma-systems.com>
+
+commit 0ac417b8f124427c90ec8c2ef4f632b821d924cc upstream.
+
+Q7_THRM# pin is connected to a diode on the module which is used
+as a level shifter, and the pin have a pull-down enabled by
+default. We need to configure it to internal pull-up, other-
+wise whenever the pin is configured as INPUT and we try to
+control it externally the value will always remain zero.
+
+Signed-off-by: Iskander Amara <iskander.amara@theobroma-systems.com>
+Fixes: 2c66fc34e945 ("arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM")
+Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
+Cc: stable@vger.kernel.org
+Link: https://lore.kernel.org/r/20240308085243.69903-1-iskander.amara@theobroma-systems.com
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi |   10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi
+@@ -396,6 +396,16 @@
+ };
+ 
+ &pinctrl {
++	pinctrl-names = "default";
++	pinctrl-0 = <&q7_thermal_pin>;
++
++	gpios {
++		q7_thermal_pin: q7-thermal-pin {
++			rockchip,pins =
++				<0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	};
++
+ 	i2c8 {
+ 		i2c8_xfer_a: i2c8-xfer {
+ 			rockchip,pins =
diff --git a/queue-5.15/drm-amdgpu-fix-leak-when-gpu-memory-allocation-fails.patch b/queue-5.15/drm-amdgpu-fix-leak-when-gpu-memory-allocation-fails.patch
new file mode 100644
index 0000000000..54d0a646bb
--- /dev/null
+++ b/queue-5.15/drm-amdgpu-fix-leak-when-gpu-memory-allocation-fails.patch
@@ -0,0 +1,31 @@
+From 25e9227c6afd200bed6774c866980b8e36d033af Mon Sep 17 00:00:00 2001
+From: Mukul Joshi <mukul.joshi@amd.com>
+Date: Thu, 18 Apr 2024 11:32:34 -0400
+Subject: drm/amdgpu: Fix leak when GPU memory allocation fails
+
+From: Mukul Joshi <mukul.joshi@amd.com>
+
+commit 25e9227c6afd200bed6774c866980b8e36d033af upstream.
+
+Free the sync object if the memory allocation fails for any
+reason.
+
+Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c |    1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+@@ -1502,6 +1502,7 @@ err_node_allow:
+ err_bo_create:
+ 	unreserve_mem_limit(adev, size, alloc_domain, !!sg);
+ err_reserve_limit:
++	amdgpu_sync_free(&(*mem)->sync);
+ 	mutex_destroy(&(*mem)->lock);
+ 	if (gobj)
+ 		drm_gem_object_put(gobj);
diff --git a/queue-5.15/drm-amdgpu-sdma5.2-use-legacy-hdp-flush-for-sdma2-3.patch b/queue-5.15/drm-amdgpu-sdma5.2-use-legacy-hdp-flush-for-sdma2-3.patch
new file mode 100644
index 0000000000..b7c4e25007
--- /dev/null
+++ b/queue-5.15/drm-amdgpu-sdma5.2-use-legacy-hdp-flush-for-sdma2-3.patch
@@ -0,0 +1,57 @@
+From 9792b7cc18aaa0c2acae6af5d0acf249bcb1ab0d Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Sun, 14 Apr 2024 21:20:56 -0400
+Subject: drm/amdgpu/sdma5.2: use legacy HDP flush for SDMA2/3
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit 9792b7cc18aaa0c2acae6af5d0acf249bcb1ab0d upstream.
+
+This avoids a potential conflict with firmwares with the newer
+HDP flush mechanism.
+
+Reviewed-by: Christian König <christian.koenig@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c |   24 ++++++++++++++----------
+ 1 file changed, 14 insertions(+), 10 deletions(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
++++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
+@@ -404,17 +404,21 @@ static void sdma_v5_2_ring_emit_hdp_flus
+ 	u32 ref_and_mask = 0;
+ 	const struct nbio_hdp_flush_reg *nbio_hf_reg = adev->nbio.hdp_flush_reg;
+ 
+-	ref_and_mask = nbio_hf_reg->ref_and_mask_sdma0 << ring->me;
++	if (ring->me > 1) {
++		amdgpu_asic_flush_hdp(adev, ring);
++	} else {
++		ref_and_mask = nbio_hf_reg->ref_and_mask_sdma0 << ring->me;
+ 
+-	amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_POLL_REGMEM) |
+-			  SDMA_PKT_POLL_REGMEM_HEADER_HDP_FLUSH(1) |
+-			  SDMA_PKT_POLL_REGMEM_HEADER_FUNC(3)); /* == */
+-	amdgpu_ring_write(ring, (adev->nbio.funcs->get_hdp_flush_done_offset(adev)) << 2);
+-	amdgpu_ring_write(ring, (adev->nbio.funcs->get_hdp_flush_req_offset(adev)) << 2);
+-	amdgpu_ring_write(ring, ref_and_mask); /* reference */
+-	amdgpu_ring_write(ring, ref_and_mask); /* mask */
+-	amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |
+-			  SDMA_PKT_POLL_REGMEM_DW5_INTERVAL(10)); /* retry count, poll interval */
++		amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_POLL_REGMEM) |
++				  SDMA_PKT_POLL_REGMEM_HEADER_HDP_FLUSH(1) |
++				  SDMA_PKT_POLL_REGMEM_HEADER_FUNC(3)); /* == */
++		amdgpu_ring_write(ring, (adev->nbio.funcs->get_hdp_flush_done_offset(adev)) << 2);
++		amdgpu_ring_write(ring, (adev->nbio.funcs->get_hdp_flush_req_offset(adev)) << 2);
++		amdgpu_ring_write(ring, ref_and_mask); /* reference */
++		amdgpu_ring_write(ring, ref_and_mask); /* mask */
++		amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |
++				  SDMA_PKT_POLL_REGMEM_DW5_INTERVAL(10)); /* retry count, poll interval */
++	}
+ }
+ 
+ /**
diff --git a/queue-5.15/series b/queue-5.15/series
index c0fd0aa1ff..378923e71b 100644
--- a/queue-5.15/series
+++ b/queue-5.15/series
@@ -56,3 +56,6 @@ bluetooth-qca-fix-null-deref-on-non-serdev-suspend.patch
 mmc-sdhci-msm-pervent-access-to-suspended-controller.patch
 btrfs-fix-information-leak-in-btrfs_ioctl_logical_to_ino.patch
 cpu-re-enable-cpu-mitigations-by-default-for-x86-architectures.patch
+arm64-dts-rockchip-enable-internal-pull-up-for-q7_thrm-on-rk3399-puma.patch
+drm-amdgpu-sdma5.2-use-legacy-hdp-flush-for-sdma2-3.patch
+drm-amdgpu-fix-leak-when-gpu-memory-allocation-fails.patch