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author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2024-04-15 15:02:11 +0200 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2024-04-15 15:02:11 +0200 |
commit | 7a3a66c76422fcd0581a9a9de33d67560b0d8333 (patch) | |
tree | 099dc45297ac6f175c947b700ad3947c0bf316e3 | |
parent | 9698a9f25190763875e8e1d664b8999db8428a1f (diff) | |
download | stable-queue-7a3a66c76422fcd0581a9a9de33d67560b0d8333.tar.gz |
4.19-stable patches
added patches:
x86-apic-force-native_apic_mem_read-to-use-the-mov-instruction.patch
-rw-r--r-- | queue-4.19/series | 1 | ||||
-rw-r--r-- | queue-4.19/x86-apic-force-native_apic_mem_read-to-use-the-mov-instruction.patch | 70 |
2 files changed, 71 insertions, 0 deletions
diff --git a/queue-4.19/series b/queue-4.19/series index 0ca7798704..838c58ec55 100644 --- a/queue-4.19/series +++ b/queue-4.19/series @@ -9,3 +9,4 @@ net-mlx5-properly-link-new-fs-rules-into-the-tree.patch tracing-hide-unused-ftrace_event_id_fops.patch vhost-add-smp_rmb-in-vhost_vq_avail_empty.patch selftests-timers-fix-abs-warning-in-posix_timers-test.patch +x86-apic-force-native_apic_mem_read-to-use-the-mov-instruction.patch diff --git a/queue-4.19/x86-apic-force-native_apic_mem_read-to-use-the-mov-instruction.patch b/queue-4.19/x86-apic-force-native_apic_mem_read-to-use-the-mov-instruction.patch new file mode 100644 index 0000000000..ec3cae9e1b --- /dev/null +++ b/queue-4.19/x86-apic-force-native_apic_mem_read-to-use-the-mov-instruction.patch @@ -0,0 +1,70 @@ +From 5ce344beaca688f4cdea07045e0b8f03dc537e74 Mon Sep 17 00:00:00 2001 +From: Adam Dunlap <acdunlap@google.com> +Date: Mon, 18 Mar 2024 16:09:27 -0700 +Subject: x86/apic: Force native_apic_mem_read() to use the MOV instruction + +From: Adam Dunlap <acdunlap@google.com> + +commit 5ce344beaca688f4cdea07045e0b8f03dc537e74 upstream. + +When done from a virtual machine, instructions that touch APIC memory +must be emulated. By convention, MMIO accesses are typically performed +via io.h helpers such as readl() or writeq() to simplify instruction +emulation/decoding (ex: in KVM hosts and SEV guests) [0]. + +Currently, native_apic_mem_read() does not follow this convention, +allowing the compiler to emit instructions other than the MOV +instruction generated by readl(). In particular, when the kernel is +compiled with clang and run as a SEV-ES or SEV-SNP guest, the compiler +would emit a TESTL instruction which is not supported by the SEV-ES +emulator, causing a boot failure in that environment. It is likely the +same problem would happen in a TDX guest as that uses the same +instruction emulator as SEV-ES. + +To make sure all emulators can emulate APIC memory reads via MOV, use +the readl() function in native_apic_mem_read(). It is expected that any +emulator would support MOV in any addressing mode as it is the most +generic and is what is usually emitted currently. + +The TESTL instruction is emitted when native_apic_mem_read() is inlined +into apic_mem_wait_icr_idle(). The emulator comes from +insn_decode_mmio() in arch/x86/lib/insn-eval.c. It's not worth it to +extend insn_decode_mmio() to support more instructions since, in theory, +the compiler could choose to output nearly any instruction for such +reads which would bloat the emulator beyond reason. + + [0] https://lore.kernel.org/all/20220405232939.73860-12-kirill.shutemov@linux.intel.com/ + + [ bp: Massage commit message, fix typos. ] + +Signed-off-by: Adam Dunlap <acdunlap@google.com> +Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> +Reviewed-by: Thomas Gleixner <tglx@linutronix.de> +Reviewed-by: Ard Biesheuvel <ardb@kernel.org> +Tested-by: Kevin Loughlin <kevinloughlin@google.com> +Cc: <stable@vger.kernel.org> +Link: https://lore.kernel.org/r/20240318230927.2191933-1-acdunlap@google.com +Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> +--- + arch/x86/include/asm/apic.h | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/arch/x86/include/asm/apic.h ++++ b/arch/x86/include/asm/apic.h +@@ -11,6 +11,7 @@ + #include <asm/mpspec.h> + #include <asm/msr.h> + #include <asm/hardirq.h> ++#include <asm/io.h> + + #define ARCH_APICTIMER_STOPS_ON_C3 1 + +@@ -110,7 +111,7 @@ static inline void native_apic_mem_write + + static inline u32 native_apic_mem_read(u32 reg) + { +- return *((volatile u32 *)(APIC_BASE + reg)); ++ return readl((void __iomem *)(APIC_BASE + reg)); + } + + extern void native_apic_wait_icr_idle(void); |