diff options
Diffstat (limited to 'v5.19/70e0af37e81e8a19e207ccf14953109d793087cb')
| -rw-r--r-- | v5.19/70e0af37e81e8a19e207ccf14953109d793087cb | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/v5.19/70e0af37e81e8a19e207ccf14953109d793087cb b/v5.19/70e0af37e81e8a19e207ccf14953109d793087cb new file mode 100644 index 00000000000..28cab495cbc --- /dev/null +++ b/v5.19/70e0af37e81e8a19e207ccf14953109d793087cb @@ -0,0 +1,20 @@ +70e0af37e81e ("phy: qcom: qmp-pcie: Add QMP v6 registers layout") +c954b6d347e7 ("phy: qcom: qmp-pcie: add QMP PCIe PHY tables for SM8650") +a05b6d5135ec ("phy: qcom-qmp-pcie: add support for sa8775p") +92bd868f529a ("phy: qcom-qmp: Add support for SDX65 QMP PCIe PHY") +269b70e85282 ("phy: qcom-qmp-pcie: Add support for SM8550 g3x2 and g4x2 PCIEs") +bbe207a1aba1 ("phy: qcom-qmp-pcie: rename regs layout arrays") +027d16b51576 ("phy: qcom-qmp-pcie: rework regs layout arrays") +c70052739d16 ("phy: qcom-qmp-pcie: add support for sm8350 platform") +c99649c3359e ("phy: qcom-qmp-pcie: rename the sm8450 gen3 PHY config tables") +883aebf6e1ea ("phy: qcom-qmp-pcie: Fix sm8450_qmp_gen4x2_pcie_pcs_tbl[] register names") +9ddcd920f8ed ("phy: qcom-qmp-pcie: Fix high latency with 4x2 PHY when ASPM is enabled") +6c37a02b2518 ("phy: qcom-qmp-pcie: add support for sc8280xp 4-lane PHYs") +d0a846ba28dd ("phy: qcom-qmp-pcie: add support for sc8280xp") +9e420f1e7edd ("phy: qcom-qmp-pcie: add support for pipediv2 clock") +fffdeaf853d8 ("phy: qcom-qmp-pcie: fix initialisation reset") +7bc609e34899 ("phy: qcom-qmp-pcie: restructure PHY creation") +ec7bc1b40b36 ("phy: qcom-qmp-pcie: add register init helper") +d8c9a1e9c223 ("phy: qcom-qmp-pcie: use shorter tables identifiers") +f8b641146484 ("phy: qcom-qmp-pcie: clean up PHY lane init") +63bf101ae191 ("phy: qcom-qmp-pcie: rename PHY ops structure") |