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| author | Sasha Levin <sashal@kernel.org> | 2024-03-12 13:41:20 -0400 |
|---|---|---|
| committer | Sasha Levin <sashal@kernel.org> | 2024-03-12 13:41:20 -0400 |
| commit | 6d5487aff7814242efdb4780b352909252eed27e (patch) | |
| tree | 08b97c01182866a087fc85469352a99afd5e4c4a /v5.4/d6a41f184dcea0814260af2780e147022c11dca8 | |
| parent | b5134c13fe51c08b7db80b2e52003fed352dd549 (diff) | |
| download | deps-6d5487aff7814242efdb4780b352909252eed27e.tar.gz | |
Tue Mar 12 01:41:07 PM EDT 2024
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'v5.4/d6a41f184dcea0814260af2780e147022c11dca8')
| -rw-r--r-- | v5.4/d6a41f184dcea0814260af2780e147022c11dca8 | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/v5.4/d6a41f184dcea0814260af2780e147022c11dca8 b/v5.4/d6a41f184dcea0814260af2780e147022c11dca8 new file mode 100644 index 00000000000..c13c592be7c --- /dev/null +++ b/v5.4/d6a41f184dcea0814260af2780e147022c11dca8 @@ -0,0 +1,20 @@ +d6a41f184dce ("x86/startup_64: Simplify calculation of initial page table address") +721f791ce1cd ("x86/boot: Use 32-bit XOR to clear registers") +30579c8baa5b ("x86/sev: Do the C-bit verification only on the BSP") +2f69a81ad687 ("x86/head_64: Store boot_params pointer in callee save register") +7e75178a0950 ("x86/smpboot: Support parallel startup of secondary CPUs") +8f6be6d870e8 ("x86/smpboot: Remove initial_gs") +c253b64020c7 ("x86/smpboot: Remove early_gdt_descr on 64-bit") +3adee777ad0d ("x86/smpboot: Remove initial_stack on 64-bit") +5d8213864ade ("x86/retbleed: Add SKL return thunk") +770ae1b70952 ("x86/returnthunk: Allow different return thunks") +c063a217bc07 ("x86/percpu: Move current_top_of_stack next to current_task") +7443b296e699 ("x86/percpu: Move cpu_number next to current_task") +64701838bf05 ("x86/percpu: Move preempt_count next to current_task") +e57ef2ed97c1 ("x86: Put hot per CPU variables into a struct") +332924973725 ("x86/nospec: Fix i386 RSB stuffing") +4e3aa9238277 ("x86/nospec: Unwreck the RSB stuffing") +ba6e31af2be9 ("x86/speculation: Add LFENCE to RSB fill sequence") +2b1299322016 ("x86/speculation: Add RSB VM Exit protections") +553de6e1157d ("tools headers cpufeatures: Sync with the kernel sources") +28a99e95f55c ("x86/amd: Use IBPB for firmware calls") |