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| author | Marc Zyngier <marc.zyngier@arm.com> | 2012-07-11 21:46:06 +0100 |
|---|---|---|
| committer | Marc Zyngier <marc.zyngier@arm.com> | 2012-07-11 21:46:06 +0100 |
| commit | 984557b0065a42a505e39c3a72b4f32c185ec700 (patch) | |
| tree | 2e5e9a456f0c233b06ed71f55d17b8d7c72434a0 | |
| parent | a5c6ba54fce2e06626d5e9749e9090fb18a5cc97 (diff) | |
| download | linux-kvm-arm-kvm-a15-v10-stage-v3.5-rc5-vgic.tar.gz | |
ARM: KVM: Use HCR.TIDCP to trap L2CTLR instead of HSTR.{9,10,11}kvm-a15-v10-stage-v3.5-rc5-vgic
Despite being labeled as "Trap accesses to lockdown, DMA and TCM
operations", HCR.TIDCP actually traps L2CTLR on A15. Actually, it
is a perfect replacement for HSTR.{9,10,11}. (We could use HDCR to
control access to the percormance counters).
Only keep HSTR.15 for which there is no alternative, and use HCR.TIDP
to control L2CTLR access.
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
| -rw-r--r-- | arch/arm/include/asm/kvm_arm.h | 3 | ||||
| -rw-r--r-- | arch/arm/kvm/interrupts.S | 4 |
2 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/include/asm/kvm_arm.h b/arch/arm/include/asm/kvm_arm.h index 4142d181b8298e..afa628ddbe429e 100644 --- a/arch/arm/include/asm/kvm_arm.h +++ b/arch/arm/include/asm/kvm_arm.h @@ -62,6 +62,7 @@ /* * The bits we set in HCR: * TAC: Trap ACTLR + * TIDCP: Trap L2CTRL (on A15) * TSC: Trap SMC * TSW: Trap cache operations by set/way * TWI: Trap WFI @@ -74,7 +75,7 @@ */ #define HCR_GUEST_MASK (HCR_TSC | HCR_TSW | HCR_TWI | HCR_VM | HCR_BSU_IS | \ HCR_FB | HCR_TAC | HCR_AMO | HCR_IMO | HCR_FMO | \ - HCR_SWIO) + HCR_TIDCP | HCR_SWIO) #define HCR_VIRT_EXCP_MASK (HCR_VA | HCR_VI | HCR_VF) /* System Control Register (SCTLR) bits */ diff --git a/arch/arm/kvm/interrupts.S b/arch/arm/kvm/interrupts.S index eb2687019812e9..b202d434a1cb96 100644 --- a/arch/arm/kvm/interrupts.S +++ b/arch/arm/kvm/interrupts.S @@ -409,9 +409,9 @@ ENDPROC(__kvm_flush_vm_context) * (hardware reset value is 0) */ .macro set_hstr entry mrc p15, 4, r2, c1, c1, 3 - ldr r3, =(HSTR_T(9) | HSTR_T(10) | HSTR_T(11) | HSTR_T(15)) + ldr r3, =HSTR_T(15) .if \entry == 1 - orr r2, r2, r3 @ Trap CR{9,10,11,15} + orr r2, r2, r3 @ Trap CRn=15 .else bic r2, r2, r3 @ Don't trap any CRx accesses .endif |