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| author | Arnd Bergmann <arnd@arndb.de> | 2015-03-11 15:33:41 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2015-03-11 15:33:41 +0100 |
| commit | e76296580d32b2b967a395b9e77bc6f69d55852e (patch) | |
| tree | 7ec731e64502a5f33c39c4e496198af36d938ba7 /arch | |
| parent | 8c1134080e9da5b485653d47962196a54d9ec006 (diff) | |
| parent | 5957457a2d96e4c9b2fecd40f29cdb3bb841d75e (diff) | |
| download | infiniband-e76296580d32b2b967a395b9e77bc6f69d55852e.tar.gz | |
Merge tag 'at91-fixes2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into fixes
Pull "Second fixes batch for AT91 on 4.0" from Nicolas Ferre:
- little fix for !MMU debug: may also help for randconfig
- fix of 2 errors in LCD clock definitions
- in PM code, not writing the key leads to not execute the action
* tag 'at91-fixes2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: at91/pm: MOR register KEY was missing
ARM: at91/dt: sama5d4: fix lcdck clock definition
ARM: at91/dt: sama5d4: rename lcd_clk into lcdc_clk
ARM: at91: debug: fix non MMU debug
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/sama5d4.dtsi | 6 | ||||
| -rw-r--r-- | arch/arm/include/debug/at91.S | 5 | ||||
| -rw-r--r-- | arch/arm/mach-at91/pm_slowclock.S | 2 |
3 files changed, 9 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi index 97d5b9759c070b..8240b490825ca4 100644 --- a/arch/arm/boot/dts/sama5d4.dtsi +++ b/arch/arm/boot/dts/sama5d4.dtsi @@ -462,8 +462,8 @@ lcdck: lcdck { #clock-cells = <0>; - reg = <4>; - clocks = <&smd>; + reg = <3>; + clocks = <&mck>; }; smdck: smdck { @@ -771,7 +771,7 @@ reg = <50>; }; - lcd_clk: lcd_clk { + lcdc_clk: lcdc_clk { #clock-cells = <0>; reg = <51>; }; diff --git a/arch/arm/include/debug/at91.S b/arch/arm/include/debug/at91.S index 80a6501b4d5068..c3c45e628e33bb 100644 --- a/arch/arm/include/debug/at91.S +++ b/arch/arm/include/debug/at91.S @@ -18,8 +18,11 @@ #define AT91_DBGU 0xfc00c000 /* SAMA5D4_BASE_USART3 */ #endif -/* Keep in sync with mach-at91/include/mach/hardware.h */ +#ifdef CONFIG_MMU #define AT91_IO_P2V(x) ((x) - 0x01000000) +#else +#define AT91_IO_P2V(x) (x) +#endif #define AT91_DBGU_SR (0x14) /* Status Register */ #define AT91_DBGU_THR (0x1c) /* Transmitter Holding Register */ diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S index a2cc49f96f616e..8ab80e579be0bb 100644 --- a/arch/arm/mach-at91/pm_slowclock.S +++ b/arch/arm/mach-at91/pm_slowclock.S @@ -205,6 +205,7 @@ sdr_sr_done: /* Turn off the main oscillator */ ldr tmp1, [pmc, #AT91_CKGR_MOR] bic tmp1, tmp1, #AT91_PMC_MOSCEN + orr tmp1, tmp1, #AT91_PMC_KEY str tmp1, [pmc, #AT91_CKGR_MOR] /* Wait for interrupt */ @@ -213,6 +214,7 @@ sdr_sr_done: /* Turn on the main oscillator */ ldr tmp1, [pmc, #AT91_CKGR_MOR] orr tmp1, tmp1, #AT91_PMC_MOSCEN + orr tmp1, tmp1, #AT91_PMC_KEY str tmp1, [pmc, #AT91_CKGR_MOR] wait_moscrdy |