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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2018-07-26 18:42:51 +0100 |
|---|---|---|
| committer | Ben Hutchings <ben.hutchings@codethink.co.uk> | 2018-08-24 19:18:25 +0100 |
| commit | 15bee9b335366b40df4ecf72bcf27d5504a1738c (patch) | |
| tree | 7b6bdc33c8ac3509791d809f4fd6ff351d013ec1 | |
| parent | e191ed4c7995e5864816a59bea255b1bd4e1289b (diff) | |
| download | linux-cip-15bee9b335366b40df4ecf72bcf27d5504a1738c.tar.gz | |
ARM: dts: r8a7745: Add Inter Connect RAM
RZ/G1E has 3 regions of Inter Connect RAM (72 + 4 + 256 KiB).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit 825216b8160b53b83f405a1e7b6c647e4e99e25a)
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk>
| -rw-r--r-- | arch/arm/boot/dts/r8a7745.dtsi | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi index 33236c04fbee58..0afd5f0b53b6a2 100644 --- a/arch/arm/boot/dts/r8a7745.dtsi +++ b/arch/arm/boot/dts/r8a7745.dtsi @@ -1022,6 +1022,21 @@ status = "disabled"; }; + icram2: sram@e6300000 { + compatible = "mmio-sram"; + reg = <0 0xe6300000 0 0x40000>; + }; + + icram0: sram@e63a0000 { + compatible = "mmio-sram"; + reg = <0 0xe63a0000 0 0x12000>; + }; + + icram1: sram@e63c0000 { + compatible = "mmio-sram"; + reg = <0 0xe63c0000 0 0x1000>; + }; + ether: ethernet@ee700000 { compatible = "renesas,ether-r8a7745"; reg = <0 0xee700000 0 0x400>; |