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| author | Joel Fernandes (Google) <joel@joelfernandes.org> | 2023-10-14 17:42:16 +0900 |
|---|---|---|
| committer | Paul E. McKenney <paulmck@kernel.org> | 2023-10-15 20:54:19 -0700 |
| commit | bf9d25963684d3d720a8f6dbd8fe590864deae50 (patch) | |
| tree | ea05db48665fdc7928eff847170456aee97a4f91 | |
| parent | f96a8471ef72c8466d585572581f4d86fb6e852f (diff) | |
| download | perfbook-bf9d25963684d3d720a8f6dbd8fe590864deae50.tar.gz | |
memorder: Add info on recent x86 implementation of smp_mb()
smp_mb() uses lock;add for x86 in the linux kernel. Add information
about the same.
Signed-off-by: Joel Fernandes (Google) <joel@joelfernandes.org>
Co-developed-by: Akira Yokosawa <akiyks@gmail.com>
Signed-off-by: Akira Yokosawa <akiyks@gmail.com>
Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
| -rw-r--r-- | memorder/memorder.tex | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/memorder/memorder.tex b/memorder/memorder.tex index 5c978fbe..6b9c3268 100644 --- a/memorder/memorder.tex +++ b/memorder/memorder.tex @@ -6081,6 +6081,16 @@ A few older variants of the x86 CPU have a mode bit that enables out-of-order stores, and for these CPUs, \co{smp_wmb()} must also be defined to be \co{lock;addl}. +A 2017 kernel commit by Michael S.~Tsirkin replaced \co{mfence} with +\co{lock;addl} in \co{smp_mb()}, achieving a 60 percent performance +boost~\cite{Tsirkin2017}. +The change used a 4-byte negative offset from \co{SP} to avoid +slowness due to false data dependencies, instead of directly +accessing memory pointed to by \co{SP}. +\co{clflush} users still need to use \co{mfence} for ordering. +Therefore, they were converted to use \co{mb()}, which uses \co{mfence} +as before, instead of \co{smp_mb()}. + Although newer x86 implementations accommodate self-modifying code without any special instructions, to be fully compatible with past and potential future x86 implementations, a given CPU must |