cpu/hwfreelunch: Move "3D Integration" section down

Signed-off-by: Paul E. McKenney <paulmck@kernel.org>

1 files changed, 47 insertions, 44 deletions

diff --git a/cpu/hwfreelunch.tex b/cpu/hwfreelunch.tex
index 339a50d6..db8795f4 100644
--- a/cpu/hwfreelunch.tex
+++ b/cpu/hwfreelunch.tex
@@ -114,55 +114,15 @@ There are nevertheless some technologies (both hardware and software)
 that might help improve matters:
 
 \begin{enumerate}
-\item	3D integration,
 \item	Novel materials and processes,
 \item	Substituting light for electricity,
+\item	3D integration,
 \item	Special-purpose accelerators, and
 \item	Existing parallel software.
 \end{enumerate}
 
 Each of these is described in one of the following sections.
 
-\subsection{3D Integration}
-\label{sec:cpu:3D Integration}
-
-3-dimensional integration (3DI) is the practice of bonding
-very thin silicon dies to each other in a vertical stack.
-This practice provides potential benefits, but also poses
-significant fabrication challenges~\cite{JohnKnickerbocker2008:3DI}.
-
-\begin{figure}
-\centering
-\resizebox{3in}{!}{\includegraphics{cpu/3DI}}
-\caption{Latency Benefit of 3D Integration}
-\label{fig:cpu:Latency Benefit of 3D Integration}
-\end{figure}
-
-Perhaps the most important benefit of 3DI is decreased path length through
-the system, as shown in
-\cref{fig:cpu:Latency Benefit of 3D Integration}.
-A 3-centimeter silicon die is replaced with a stack of four 1.5-centimeter
-dies, in theory decreasing the maximum path through the system by a factor
-of two, keeping in mind that each layer is quite thin.
-In addition, given proper attention to design and placement,
-long horizontal electrical connections (which are both slow and
-power hungry) can be replaced by short vertical electrical connections,
-which are both faster and more power efficient.
-
-However, delays due to levels of clocked logic will not be decreased
-by 3D integration, and significant manufacturing, testing, power-supply,
-and heat-dissipation problems must be solved for 3D integration to
-reach production while still delivering on its promise.
-The heat-dissipation problems might be solved using
-semiconductors based on diamond, which is a good conductor
-for heat, but an electrical insulator.
-That said, it remains difficult to grow large single diamond crystals,
-to say nothing of slicing them into wafers.
-In addition, it seems unlikely that any of these technologies will be able to
-deliver the exponential increases to which some people have become accustomed.
-That said, they may be necessary steps on the path to the late Jim Gray's
-``smoking hairy golf balls''~\cite{JimGray2002SmokingHairyGolfBalls}.
-
 \subsection{Novel Materials and Processes}
 \label{sec:cpu:Novel Materials and Processes}
 
@@ -172,9 +132,12 @@ have but two fundamental problems:
 \item The finite speed of light and
 \item The atomic nature of matter~\cite{BryanGardiner2007}.
 \end{enumerate*}
-It is possible that semiconductor manufacturers are approaching these
-limits, but there are nevertheless a few avenues of research and
-development focused on working around these fundamental limits.
+That is right, light is too slow and atoms are too big!!!
+
+It is possible that semiconductor manufacturers are approaching the limits
+implied by this pair of laws of physics, but there are nevertheless a
+few avenues of research and development focused on working around these
+fundamental limits.
 
 One workaround for the atomic nature of matter are so-called
 ``high-K dielectric'' materials, which allow larger devices to mimic the
@@ -220,6 +183,46 @@ That said, absent some fundamental advances in the field of physics,
 any exponential increases in the speed of data flow
 will be sharply limited by the actual speed of light in a vacuum.
 
+\subsection{3D Integration}
+\label{sec:cpu:3D Integration}
+
+3-dimensional integration (3DI) is the practice of bonding
+very thin silicon dies to each other in a vertical stack.
+This practice provides potential benefits, but also poses
+significant fabrication challenges~\cite{JohnKnickerbocker2008:3DI}.
+
+\begin{figure}
+\centering
+\resizebox{3in}{!}{\includegraphics{cpu/3DI}}
+\caption{Latency Benefit of 3D Integration}
+\label{fig:cpu:Latency Benefit of 3D Integration}
+\end{figure}
+
+Perhaps the most important benefit of 3DI is decreased path length through
+the system, as shown in
+\cref{fig:cpu:Latency Benefit of 3D Integration}.
+A 3-centimeter silicon die is replaced with a stack of four 1.5-centimeter
+dies, in theory decreasing the maximum path through the system by a factor
+of two, keeping in mind that each layer is quite thin.
+In addition, given proper attention to design and placement,
+long horizontal electrical connections (which are both slow and
+power hungry) can be replaced by short vertical electrical connections,
+which are both faster and more power efficient.
+
+However, delays due to levels of clocked logic will not be decreased
+by 3D integration, and significant manufacturing, testing, power-supply,
+and heat-dissipation problems must be solved for 3D integration to
+reach production while still delivering on its promise.
+The heat-dissipation problems might be solved using
+semiconductors based on diamond, which is a good conductor
+for heat, but an electrical insulator.
+That said, it remains difficult to grow large single diamond crystals,
+to say nothing of slicing them into wafers.
+In addition, it seems unlikely that any of these technologies will be able to
+deliver the exponential increases to which some people have become accustomed.
+That said, they may be necessary steps on the path to the late Jim Gray's
+``smoking hairy golf balls''~\cite{JimGray2002SmokingHairyGolfBalls}.
+
 \subsection{Special-Purpose Accelerators}
 \label{sec:cpu:Special-Purpose Accelerators}