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| author | Akira Yokosawa <akiyks@gmail.com> | 2024-01-23 23:58:24 +0900 |
|---|---|---|
| committer | Paul E. McKenney <paulmck@kernel.org> | 2024-01-30 15:31:00 -0800 |
| commit | 154a6b68ca33cca1ee7e7bdb9f133efa00ae93a8 (patch) | |
| tree | 3b3cd3cd4e4a0b67a7cca420c86b7363a1402b64 | |
| parent | 515b31fcda9170df11edfbc6e7c25a8ef43d79dd (diff) | |
| download | perfbook-154a6b68ca33cca1ee7e7bdb9f133efa00ae93a8.tar.gz | |
memorder: Tweak size of figures in Answer to QQz on x86 memory ordering
The use \columnwidth results in too large figures in -1c and -eb
builds. Instead, use \twocolumwidth (\columnwidth of 2c build) and
make them more or less similarly scaled.
Signed-off-by: Akira Yokosawa <akiyks@gmail.com>
Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
| -rw-r--r-- | memorder/memorder.tex | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/memorder/memorder.tex b/memorder/memorder.tex index c3f52f07..c45ac4f6 100644 --- a/memorder/memorder.tex +++ b/memorder/memorder.tex @@ -2854,7 +2854,7 @@ passage of time itself as a memory-ordering operation. \begin{figure} \centering -\resizebox{\columnwidth}{!}{\includegraphics{CodeSamples/cpu/data/coe-nvals}} +\resizebox{\twocolumnwidth}{!}{\includegraphics{CodeSamples/cpu/data/coe-nvals}} \caption{x86 CPUs Can Disagree} \label{fig:memorder:x86 CPUs Can Disagree} \end{figure} @@ -2876,7 +2876,7 @@ passage of time itself as a memory-ordering operation. \begin{figure} \centering -\resizebox{\columnwidth}{!}{\includegraphics{memorder/co-hopes}} +\resizebox{.85\twocolumnwidth}{!}{\includegraphics{memorder/co-hopes}} \caption{Is Store-to-Store Counter-Temporal on x86?} \label{fig:memorder:Is Store-to-Store Counter-Temporal on x86?} \end{figure} @@ -2899,7 +2899,7 @@ passage of time itself as a memory-ordering operation. \begin{figure} \centering -\resizebox{\columnwidth}{!}{\includegraphics{CodeSamples/cpu/data/coe}} +\resizebox{\twocolumnwidth}{!}{\includegraphics{CodeSamples/cpu/data/coe}} \caption{Store-to-Store is Counter-Temporal on x86} \label{fig:memorder:Store-to-Store is Counter-Temporal on x86} \end{figure} @@ -2922,7 +2922,7 @@ passage of time itself as a memory-ordering operation. \begin{figure} \centering -\resizebox{2.2in}{!}{\includegraphics{memorder/fr-hopes}} +\resizebox{.6\twocolumnwidth}{!}{\includegraphics{memorder/fr-hopes}} \caption{Is Load-to-Store Counter-Temporal on x86?} \label{fig:memorder:Is Load-to-Store Counter-Temporal on x86?} \end{figure} @@ -2940,7 +2940,7 @@ passage of time itself as a memory-ordering operation. \begin{figure} \centering -\resizebox{\columnwidth}{!}{\includegraphics{CodeSamples/cpu/data/fre}} +\resizebox{\twocolumnwidth}{!}{\includegraphics{CodeSamples/cpu/data/fre}} \caption{Load-to-Store is Counter-Temporal on x86} \label{fig:memorder:Load-to-Store is Counter-Temporal on x86} \end{figure} @@ -2961,14 +2961,14 @@ passage of time itself as a memory-ordering operation. \begin{figure} \centering -\resizebox{\columnwidth}{!}{\includegraphics{memorder/rf-hopes}} +\resizebox{\twocolumnwidth}{!}{\includegraphics{memorder/rf-hopes}} \caption{Is Store-to-Load Counter-Temporal on x86?} \label{fig:memorder:Is Store-to-Load Counter-Temporal on x86?} \end{figure} \begin{figure} \centering -\resizebox{\columnwidth}{!}{\includegraphics{CodeSamples/cpu/data/rfe}} +\resizebox{\twocolumnwidth}{!}{\includegraphics{CodeSamples/cpu/data/rfe}} \caption{Store-to-Load is Temporal on x86} \label{fig:memorder:Store-to-Load is Temporal on x86} \end{figure} |