drm: add i915 dependency patch for next patch

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>

2 files changed, 227 insertions, 0 deletions

diff --git a/queue/drm-i915-Remove-.is_mobile-field-from-platform-struc.patch b/queue/drm-i915-Remove-.is_mobile-field-from-platform-struc.patch
new file mode 100644
index 0000000..070804d
--- /dev/null
+++ b/queue/drm-i915-Remove-.is_mobile-field-from-platform-struc.patch
@@ -0,0 +1,226 @@
+From 0d00dc39ab0d864a11dd74191ea78e31f8d61d4b Mon Sep 17 00:00:00 2001
+From: Carlos Santa <carlos.santa@intel.com>
+Date: Wed, 17 Aug 2016 12:30:37 -0700
+Subject: [PATCH] drm/i915: Remove .is_mobile field from platform struct
+
+commit 8d9c20e1d1e3833b5c4dab33d59cb92ea162da6a upstream.
+
+As recommended by Ville Syrjala removing .is_mobile field from the
+platform struct definition for vlv and hsw+ GPUs as there's no need to
+make the distinction in later hardware anymore. Keep it for older GPUs
+as it is still needed for ilk-ivb.
+
+Signed-off-by: Carlos Santa <carlos.santa@intel.com>
+Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
+Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
+
+diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
+index 8b8852bc2f4a..f306698a4cb4 100644
+--- a/arch/x86/kernel/early-quirks.c
++++ b/arch/x86/kernel/early-quirks.c
+@@ -507,8 +507,7 @@ static const struct pci_device_id intel_early_ids[] __initconst = {
+ 	INTEL_I915GM_IDS(&gen3_early_ops),
+ 	INTEL_I945G_IDS(&gen3_early_ops),
+ 	INTEL_I945GM_IDS(&gen3_early_ops),
+-	INTEL_VLV_M_IDS(&gen6_early_ops),
+-	INTEL_VLV_D_IDS(&gen6_early_ops),
++	INTEL_VLV_IDS(&gen6_early_ops),
+ 	INTEL_PINEVIEW_IDS(&gen3_early_ops),
+ 	INTEL_I965G_IDS(&gen3_early_ops),
+ 	INTEL_G33_IDS(&gen3_early_ops),
+@@ -521,10 +520,8 @@ static const struct pci_device_id intel_early_ids[] __initconst = {
+ 	INTEL_SNB_M_IDS(&gen6_early_ops),
+ 	INTEL_IVB_M_IDS(&gen6_early_ops),
+ 	INTEL_IVB_D_IDS(&gen6_early_ops),
+-	INTEL_HSW_D_IDS(&gen6_early_ops),
+-	INTEL_HSW_M_IDS(&gen6_early_ops),
+-	INTEL_BDW_M_IDS(&gen8_early_ops),
+-	INTEL_BDW_D_IDS(&gen8_early_ops),
++	INTEL_HSW_IDS(&gen6_early_ops),
++	INTEL_BDW_IDS(&gen8_early_ops),
+ 	INTEL_CHV_IDS(&chv_early_ops),
+ 	INTEL_SKL_IDS(&gen9_early_ops),
+ 	INTEL_BXT_IDS(&gen9_early_ops),
+diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
+index 949c01686a66..2b6c0d214e55 100644
+--- a/drivers/gpu/drm/i915/i915_pci.c
++++ b/drivers/gpu/drm/i915/i915_pci.c
+@@ -248,13 +248,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
+ 	GEN_DEFAULT_PIPEOFFSETS, \
+ 	CURSOR_OFFSETS
+ 
+-static const struct intel_device_info intel_valleyview_m_info = {
+-	VLV_FEATURES,
+-	.is_valleyview = 1,
+-	.is_mobile = 1,
+-};
+-
+-static const struct intel_device_info intel_valleyview_d_info = {
++static const struct intel_device_info intel_valleyview_info = {
+ 	VLV_FEATURES,
+ 	.is_valleyview = 1,
+ };
+@@ -265,47 +259,28 @@ static const struct intel_device_info intel_valleyview_d_info = {
+ 	.has_ddi = 1, \
+ 	.has_fpga_dbg = 1
+ 
+-static const struct intel_device_info intel_haswell_d_info = {
++static const struct intel_device_info intel_haswell_info = {
+ 	HSW_FEATURES,
+ 	.is_haswell = 1,
+ };
+ 
+-static const struct intel_device_info intel_haswell_m_info = {
+-	HSW_FEATURES,
+-	.is_haswell = 1,
+-	.is_mobile = 1,
+-};
+-
+ #define BDW_FEATURES \
+ 	HSW_FEATURES, \
+ 	BDW_COLORS
+ 
+-static const struct intel_device_info intel_broadwell_d_info = {
++static const struct intel_device_info intel_broadwell_info = {
+ 	BDW_FEATURES,
+ 	.gen = 8,
+ 	.is_broadwell = 1,
+ };
+ 
+-static const struct intel_device_info intel_broadwell_m_info = {
+-	BDW_FEATURES,
+-	.gen = 8, .is_mobile = 1,
+-	.is_broadwell = 1,
+-};
+-
+-static const struct intel_device_info intel_broadwell_gt3d_info = {
++static const struct intel_device_info intel_broadwell_gt3_info = {
+ 	BDW_FEATURES,
+ 	.gen = 8,
+ 	.is_broadwell = 1,
+ 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
+ };
+ 
+-static const struct intel_device_info intel_broadwell_gt3m_info = {
+-	BDW_FEATURES,
+-	.gen = 8, .is_mobile = 1,
+-	.is_broadwell = 1,
+-	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
+-};
+-
+ static const struct intel_device_info intel_cherryview_info = {
+ 	.gen = 8, .num_pipes = 3,
+ 	.need_gfx_hws = 1, .has_hotplug = 1,
+@@ -386,14 +361,10 @@ static const struct pci_device_id pciidlist[] = {
+ 	INTEL_IVB_Q_IDS(&intel_ivybridge_q_info), /* must be first IVB */
+ 	INTEL_IVB_M_IDS(&intel_ivybridge_m_info),
+ 	INTEL_IVB_D_IDS(&intel_ivybridge_d_info),
+-	INTEL_HSW_D_IDS(&intel_haswell_d_info),
+-	INTEL_HSW_M_IDS(&intel_haswell_m_info),
+-	INTEL_VLV_M_IDS(&intel_valleyview_m_info),
+-	INTEL_VLV_D_IDS(&intel_valleyview_d_info),
+-	INTEL_BDW_GT12M_IDS(&intel_broadwell_m_info),
+-	INTEL_BDW_GT12D_IDS(&intel_broadwell_d_info),
+-	INTEL_BDW_GT3M_IDS(&intel_broadwell_gt3m_info),
+-	INTEL_BDW_GT3D_IDS(&intel_broadwell_gt3d_info),
++	INTEL_HSW_IDS(&intel_haswell_info),
++	INTEL_VLV_IDS(&intel_valleyview_info),
++	INTEL_BDW_GT12_IDS(&intel_broadwell_info),
++	INTEL_BDW_GT3_IDS(&intel_broadwell_gt3_info),
+ 	INTEL_CHV_IDS(&intel_cherryview_info),
+ 	INTEL_SKL_GT1_IDS(&intel_skylake_info),
+ 	INTEL_SKL_GT2_IDS(&intel_skylake_info),
+diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
+index 33466bfc6440..0d5f4268d75f 100644
+--- a/include/drm/i915_pciids.h
++++ b/include/drm/i915_pciids.h
+@@ -134,7 +134,7 @@
+ #define INTEL_IVB_Q_IDS(info) \
+ 	INTEL_QUANTA_VGA_DEVICE(info) /* Quanta transcode */
+ 
+-#define INTEL_HSW_D_IDS(info) \
++#define INTEL_HSW_IDS(info) \
+ 	INTEL_VGA_DEVICE(0x0402, info), /* GT1 desktop */ \
+ 	INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \
+ 	INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \
+@@ -179,9 +179,7 @@
+ 	INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \
+ 	INTEL_VGA_DEVICE(0x0D0E, info), /* CRW GT1 reserved */ \
+ 	INTEL_VGA_DEVICE(0x0D1E, info), /* CRW GT2 reserved */ \
+-	INTEL_VGA_DEVICE(0x0D2E, info)  /* CRW GT3 reserved */ \
+-
+-#define INTEL_HSW_M_IDS(info) \
++	INTEL_VGA_DEVICE(0x0D2E, info),  /* CRW GT3 reserved */ \
+ 	INTEL_VGA_DEVICE(0x0406, info), /* GT1 mobile */ \
+ 	INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \
+ 	INTEL_VGA_DEVICE(0x0426, info), /* GT2 mobile */ \
+@@ -198,17 +196,15 @@
+ 	INTEL_VGA_DEVICE(0x0D16, info), /* CRW GT2 mobile */ \
+ 	INTEL_VGA_DEVICE(0x0D26, info)  /* CRW GT3 mobile */
+ 
+-#define INTEL_VLV_M_IDS(info) \
++#define INTEL_VLV_IDS(info) \
+ 	INTEL_VGA_DEVICE(0x0f30, info), \
+ 	INTEL_VGA_DEVICE(0x0f31, info), \
+ 	INTEL_VGA_DEVICE(0x0f32, info), \
+ 	INTEL_VGA_DEVICE(0x0f33, info), \
+-	INTEL_VGA_DEVICE(0x0157, info)
+-
+-#define INTEL_VLV_D_IDS(info) \
++	INTEL_VGA_DEVICE(0x0157, info), \
+ 	INTEL_VGA_DEVICE(0x0155, info)
+ 
+-#define INTEL_BDW_GT12M_IDS(info)  \
++#define INTEL_BDW_GT12_IDS(info)  \
+ 	INTEL_VGA_DEVICE(0x1602, info), /* GT1 ULT */ \
+ 	INTEL_VGA_DEVICE(0x1606, info), /* GT1 ULT */ \
+ 	INTEL_VGA_DEVICE(0x160B, info), /* GT1 Iris */ \
+@@ -216,21 +212,17 @@
+ 	INTEL_VGA_DEVICE(0x1612, info), /* GT2 Halo */ \
+ 	INTEL_VGA_DEVICE(0x1616, info), /* GT2 ULT */ \
+ 	INTEL_VGA_DEVICE(0x161B, info), /* GT2 ULT */ \
+-	INTEL_VGA_DEVICE(0x161E, info)  /* GT2 ULX */
+-
+-#define INTEL_BDW_GT12D_IDS(info) \
++	INTEL_VGA_DEVICE(0x161E, info),  /* GT2 ULX */ \
+ 	INTEL_VGA_DEVICE(0x160A, info), /* GT1 Server */ \
+ 	INTEL_VGA_DEVICE(0x160D, info), /* GT1 Workstation */ \
+ 	INTEL_VGA_DEVICE(0x161A, info), /* GT2 Server */ \
+ 	INTEL_VGA_DEVICE(0x161D, info)  /* GT2 Workstation */
+ 
+-#define INTEL_BDW_GT3M_IDS(info) \
++#define INTEL_BDW_GT3_IDS(info) \
+ 	INTEL_VGA_DEVICE(0x1622, info), /* ULT */ \
+ 	INTEL_VGA_DEVICE(0x1626, info), /* ULT */ \
+ 	INTEL_VGA_DEVICE(0x162B, info), /* Iris */ \
+-	INTEL_VGA_DEVICE(0x162E, info)  /* ULX */
+-
+-#define INTEL_BDW_GT3D_IDS(info) \
++	INTEL_VGA_DEVICE(0x162E, info),  /* ULX */\
+ 	INTEL_VGA_DEVICE(0x162A, info), /* Server */ \
+ 	INTEL_VGA_DEVICE(0x162D, info)  /* Workstation */
+ 
+@@ -244,14 +236,12 @@
+ 	INTEL_VGA_DEVICE(0x163A, info), /* Server */ \
+ 	INTEL_VGA_DEVICE(0x163D, info)  /* Workstation */
+ 
+-#define INTEL_BDW_M_IDS(info) \
+-	INTEL_BDW_GT12M_IDS(info), \
+-	INTEL_BDW_GT3M_IDS(info), \
+-	INTEL_BDW_RSVDM_IDS(info)
+-
+-#define INTEL_BDW_D_IDS(info) \
+-	INTEL_BDW_GT12D_IDS(info), \
+-	INTEL_BDW_GT3D_IDS(info), \
++#define INTEL_BDW_IDS(info) \
++	INTEL_BDW_GT12_IDS(info), \
++	INTEL_BDW_GT3_IDS(info), \
++	INTEL_BDW_RSVDM_IDS(info), \
++	INTEL_BDW_GT12_IDS(info), \
++	INTEL_BDW_GT3_IDS(info), \
+ 	INTEL_BDW_RSVDD_IDS(info)
+ 
+ #define INTEL_CHV_IDS(info) \
+-- 
+2.12.0
+
diff --git a/queue/series b/queue/series
index 523f819..dcf875e 100644
--- a/queue/series
+++ b/queue/series
@@ -78,6 +78,7 @@ ACPI-sysfs-Provide-quirk-mechanism-to-prevent-GPE-fl.patch
 HID-usbhid-Add-quirk-for-the-Futaba-TOSD-5711BB-VFD.patch
 HID-usbhid-Add-quirk-for-Mayflash-Dragonrise-Dolphin.patch
 drm-edid-constify-edid-quirk-list.patch
+drm-i915-Remove-.is_mobile-field-from-platform-struc.patch
 drm-i915-more-.is_mobile-cleanups-for-BDW.patch
 drm-i915-actually-drive-the-BDW-reserved-IDs.patch
 ASoC-Intel-bytcr_rt5640-quirks-for-Insyde-devices.patch