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| author | Alexandru Elisei <alexandru.elisei@arm.com> | 2020-05-14 16:38:22 +0100 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2020-05-19 17:38:01 +0100 |
| commit | 6ea32ebdb84b1ba9d72459029eb92363efd4ffd6 (patch) | |
| tree | f9dd88a6a64d74f93512fb65a30a761c7a5be645 | |
| parent | a05e576f7fd883be1a405e7acac136eef1d601e0 (diff) | |
| download | kvmtool-6ea32ebdb84b1ba9d72459029eb92363efd4ffd6.tar.gz | |
pci: Limit configuration transaction size to 32 bits
>From PCI Local Bus Specification Revision 3.0. section 3.8 "64-Bit Bus
Extension":
"The bandwidth requirements for I/O and configuration transactions cannot
justify the added complexity, and, therefore, only memory transactions
support 64-bit data transfers".
Further down, the spec also describes the possible responses of a target
which has been requested to do a 64-bit transaction. Limit the transaction
to the lower 32 bits, to match the second accepted behaviour.
Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Link: https://lore.kernel.org/r/1589470709-4104-6-git-send-email-alexandru.elisei@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
| -rw-r--r-- | pci.c | 9 |
1 files changed, 9 insertions, 0 deletions
@@ -119,6 +119,9 @@ static bool pci_config_data_out(struct ioport *ioport, struct kvm_cpu *vcpu, u16 { union pci_config_address pci_config_address; + if (size > 4) + size = 4; + pci_config_address.w = ioport__read32(&pci_config_address_bits); /* * If someone accesses PCI configuration space offsets that are not @@ -135,6 +138,9 @@ static bool pci_config_data_in(struct ioport *ioport, struct kvm_cpu *vcpu, u16 { union pci_config_address pci_config_address; + if (size > 4) + size = 4; + pci_config_address.w = ioport__read32(&pci_config_address_bits); /* * If someone accesses PCI configuration space offsets that are not @@ -248,6 +254,9 @@ static void pci_config_mmio_access(struct kvm_cpu *vcpu, u64 addr, u8 *data, cfg_addr.w = (u32)addr; cfg_addr.enable_bit = 1; + if (len > 4) + len = 4; + if (is_write) pci__config_wr(kvm, cfg_addr, data, len); else |