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2018-04-26Enable pointer auth for EL2 and belowHEADmasterMark Rutland1-0/+10
By default, use of pointer authentication functionality (either instructions or access to keys) will trap to EL3. This patch programs SCR_EL3 to enable pointer authentication for lower exception levels. Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2018-04-26Fix out-of-tree buildJean-Philippe Brucker1-2/+11
Adding AArch32 support to the boot-wrapper changed the source layout and broke out-of-tree build. This patch allows to put all generated files into a separate directory again, and build multiple images in parallel: mkdir build/ && cd build/ ~/src/boot-wrapper-aarch64/configure ... make Make attempts to output object files into build/arch/aarchXX/, but fails because that folder doesn't exist in the build directory. Add mkdir as prerequisite for any *.o target in the arch folder. So that Make doesn't confuse the destination folder with the source, override VPATH to only affect .S and .c sources. And set $(ARCH_SRC) as order-only-prerequisite (after a '|'). Otherwise Make would rebuild all objects whenever the timestamp of $(ARCH_SRC) changes, which is every time an object is rebuilt... Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2018-04-26boot-wrapper-aarch64: Do not hardcode TEXT_LIMITSuzuki K Poulose2-3/+3
We hard code TEXT_LIMIT to check for image overflow, assuming the memory is always at 0x80000000, which may not always be true. Instead use the offset from the PHYS_OFFSET, which is actually dependent on the DT. Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2017-09-20bootwrapper: SVE: Enable SVE for EL2 and belowDave Martin2-0/+18
By default, SVE will trap to EL3. We also want to make sure that lower ELs have access to the full SVE vector length before dropping down. This patch programs CPTR_EL3 and ZCR_EL3 appropriately to enable SVE for lower exception levels and make sure that they can use the full vector length provided by the hardware. Signed-off-by: Dave Martin <Dave.Martin@arm.com> Cc: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2017-02-17Dynamically determine the set of CPUsMark Rutland5-40/+67
Currently we hard-code the set of CPUs we expect, and we have some strong expectations on the formatting of nodes. As we can configure models with differing sets of CPUs, we added the with-cpu-ids configure option to override this assumption, though in practice it turns out this is very fragile. Instead, we can parse the DTB to discover the set of CPU nodes (and hence the set of CPU IDs, and the number of CPUs). This is far more robust. This patch changes the bootwrapper to do this, removing the newly redundant --with-cpu-ids configure option. Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2017-01-19FDT.pm: add helper to get a node's full pathMark Rutland1-0/+19
This will be useful for subsequent patches where we want to automatically configure properties for nodes which may have arbitrary names. Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2017-01-19FDT.pm: add helper to get untranslated regMark Rutland1-2/+13
In some cases, we'll want to parse a reg property that cannot be translated, e.g. for cpu nodes. Add a helper to extract the reg without attempting translation, factoring this logic out of Node::get_translated_reg(). Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2017-01-09FDT.pm: consistently check defined()Mark Rutland1-4/+4
In a few cases, we check not $var to check if a var has a defined value. This also catches the case where $var has a defined value, but evaluates to false (e.g. if $var is zero). In FDT::Node::get_translated_reg(), this erroneous check means that reg entries with an address zero will not be translated, even where there is a valid set of ranges properties in parent nodes. Elsewhere, this is simply inconsistent, but not otherwise harmful. Fix the code to use defined($var) consistently. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Reported-by: Vladimir Murzin <vladimir.murzin@arm.com> Tested-by: Vladimir Murzin <vladimir.murzin@arm.com>
2017-01-03Explicitly clean linux-system.axf and xen-system.axfChristoffer Dall1-1/+1
When doing a make clean, only the output image currently configured to build is being removed. However, one would expect all build artifacts to be removed when doing a 'make clean' and when switching between Xen and Linux builds, it is easy to accidentally run an older build than intended. Simply hardcode the axf image file names. Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Julien Grall <julien.grall@arm.com> Tested-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2017-01-03Xen: Select correct dom0 consoleIan Campbell1-1/+2
If Xen is enabled, tell Dom0 to use the 'hvc0' console, and fall back to the usual ttyAMA0 otherwise. Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Julien Grall <julien.grall@arm.com> Tested-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2017-01-03Xen: Support adding DT nodesChristoffer Dall2-8/+24
Support adding xen,xen-bootargs node via --with-xen-cmdline to the configure script and automatically add the Dom0 node to the DT as well. Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Reviewed-by: Julien Grall <julien.grall@arm.com> [Mark: s/XEN_BOOTARGS/XEN_CHOSEN/] Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2017-01-03Support for building in a Xen binaryChristoffer Dall5-5/+41
Add support for building a Xen binary which includes a Dom0 image and the Dom0 command-line. If the user specifies --with-xen=<Xen>, where Xen is an appropriate AArch64 Xen binary, the build system will generate a xen-system.axf instead of a linux-system.axf. Original patch from Ian Campbell, but I modified most of it so all bugs are probably mine. [Andre: adapt to newest boot-wrapper branch, increase load address, fixup Xen image file test] Cc: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Reviewed-by: Julien Grall <julien.grall@arm.com>
2017-01-03configure: fix file detection when cross-compilingAndre Przywara1-5/+18
The autotools documentation states that AC_CHECK_FILE cannot be used when cross-compiling [1], because it's meant to check files in the target system, not on the build host. When just giving --host on the configure command line, the script detects cross compilation rather late; and as the file test just happens to execute earlier, this works anyway. However if one gives both --host and --build, cross compilation is detected very early and ./configure complains: checking for /src/linux-arm64... configure: error: cannot check for file existence when cross compiling So replace the checkfile macro usage with a simple "test -f" call (which is the recommended way of checking for files on the build host) and output proper error messages. [1] https://www.gnu.org/software/autoconf/manual/autoconf.html#Files Signed-off-by: Andre Przywara <andre.przywara@arm.com> [Mark: simplified error messages] Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2016-06-15Add AArch32 to the boot-wrapperJean-Philippe Brucker13-9/+494
This patch allows to build a 32-bit boot-wrapper, and create a complete linux-system.axf for models that start in AArch32. Most of the code is a simple translation of the AArch64 side. We add an --aarch32-bw argument to ./configure, and bump the version to 0.2, to welcome this new architecture. Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2016-06-15Protect against overlapping with the 32-bit kernelJean-Philippe Brucker2-1/+6
This patch adds a guard in the linker script to abort the build when the bootloader code overflows the 12k limit. Indeed, 32-bit Linux with LPAE enabled puts its initial page tables between 0x80003000 and 0x80007fff. Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2016-06-15Add support for 32-bit kernelJean-Philippe Brucker7-5/+63
This patch adds an --enable-aarch32-kernel parameter to ./configure, which enables dropping into AArch32 state at EL2. Notable differences with AArch64 boot are: * SCR.RW is set to 0, to declare all lower levels as AArch32, * SPSR_EL2 has a 32-bit M[4:0] field, * kernel parameters are different, but we can still put them into x0-x2, because those registers are mapped to r0-r2 (ARM ARM v8 D1.20.1) * SCTLR.CP15BEN is set, to allow the Linux decompressor to keep using its legacy CP15 barriers. * We also need to make sure MMU is disabled at EL1: hyp-stub in arm64 resets SCTLR_EL1, but the 32-bit hyp-stub doesn't. Leaving SCTRL.M set would break hotplug when no hypervisor is present. * PSCI function ID for CPU_ON differs. We don't plan to support spin method on 32-bit. PSCI is automatically enabled by ./configure, and this patch forbids disabling it. Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2016-06-15Add 32-bit compatibility to device-tree CPU nodesJean-Philippe Brucker1-4/+9
The 32-bit DT parser in Linux doesn't understand 'reg' properties with two cells, in a CPU node. Since the boot-wrapper always sets the upper bits to 0, we can restrict that size to one cell. The parser also requires the device_type property to be present. This is the case for arm64 as well, but it only fails when the patched device-tree doesn't have any CPU node to begin with. Add device_type unconditionally. Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2016-06-15AArch64: get rid of EL2 trampolineJean-Philippe Brucker4-21/+18
There is no harm in initialising the platform from EL3, so we move the call into the boot_common path of CPU0, and take the opportunity to rename ns_init_system to init_platform. Caches and MMU are now disabled at EL3, and we can also move cache maintenance in the initial boot path of each CPU. This allows us to get rid of the EL2 layer, which makes AArch32 kernel support possible. Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2016-06-15Remove MMU identity map setupJean-Philippe Brucker3-148/+1
We have a few good reasons to leave MMU disabled at EL3: * Translations defined by our static pages might alias with the kernel, leading to mismatched memory attributes and all kinds of pains. * For legacy reasons, boot-wrapper accesses are not cached at the moment (SCTLR_EL3.C is unset) * It feels cumbersome to enable the MMU for one small exclusive operation. * Removing the static page tables also frees 4k of memory, which is quite welcome when loading a 32-bit kernel case, where we only have 12k of bootloader RAM to play with. Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2016-06-15Replace exclusive accesses with a bakery lockJean-Philippe Brucker9-48/+204
The commit prepares the removal of the MMU identity map, which was only used for exclusive accesses (ldxr/stxr) in psci_cpu_on. Instead of relying on exclusives, we assume that when stage-1 translation is disabled, all EL3 memory accesses have Device type, with non-gathering and non-reordering attributes. This guarantees single-copy atomicity of aligned halfword accesses, as per the ARM ARM. We can thus switch to a less constrained (albeit bulkier) locking mechanism. This patch implements Lamport's bakery lock, which doesn't rely on atomic compare-and-swap primitives. For bisectability, we remove the call to switch_to_idmap here. Otherwise, the assertions made by the bakery lock code, regarding order of accesses, are invalid. The rest of the code will be removed in a subsequent patch. Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2016-06-15Add GCC library functionsJean-Philippe Brucker3-3/+40
GCC might generate implicit calls to standard functions, for example memcpy when copying a struct. Implement these functions upfront, to ensure that GCC never uses some optimized version, which could do unaligned device memory accesses. We only implement memcpy and memset for the moment. The others (memmove, memcmp, ...) can be added in the future if required. We also add flags "-ffunction-sections", "-fdata-sections" to GCC, and "--gc-sections" to ld, in order to avoid linking those functions into the final image when they aren't used. Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2016-06-15Rewrite cache flush in CJean-Philippe Brucker5-82/+93
Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2016-06-15Rewrite GIC drivers in CJean-Philippe Brucker8-147/+225
Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> [Mark: fold GICv3 and GICv2 patches for bisectability] Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2016-06-14Rewrite platform initialisation in CJean-Philippe Brucker4-48/+102
Add two assembly helpers for 32-bit MMIO accesses, and translate platform initialisation to C. Since we can now add features without too much pain, also output a string describing the boot-wrapper version. Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2016-06-14AArch64: clean common.SJean-Philippe Brucker3-27/+20
Remove macro drop_el since its only user is now boot.S, and move all defines to cpu.h. Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2016-06-14Rewrite boot methods in CJean-Philippe Brucker13-190/+376
This patch brings the boot-wrapper into the twenty-first century, by introducing it to the C language. This change, along with the next few patches, will greatly simplify the AArch32 port and overall maintenance. The assembly side of PSCI now only contains basic dispatchers, for both boot and SMC entries. Initial boot flow: asm _start boot.S start_(no_)el3 psci.S or spin.S C first_spin boot_common.c spin boot_common.c asm jump_kernel if CPU0 boot.S CPU_ON flow: asm smc_entry psci.S C psci_cpu_on psci.c asm smc_exit psci.S CPU_OFF flow: asm smc_entry psci.S C psci_cpu_off psci.c spin boot_common.c Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2016-06-14AArch64: factor CPU ID gettersJean-Philippe Brucker9-27/+61
This patch adds a simple utility to read the current CPU ID from C or assembly. The underlying objective of this seemingly useless change is to provide a clean base for C helpers. It introduces two include paths: include/ and arch/*/include/asm Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2016-06-14AArch64: add a small stack for each CPUJean-Philippe Brucker4-1/+46
When rewriting some bits of the boot-wrapper in C, we will need tiny per-CPU stacks. This patch reserves 256 bytes of stack for each CPU defined in the CPU_IDS macro. Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2016-06-14AArch64: extract common utilities from PSCIJean-Philippe Brucker4-48/+70
Helpers find_logical_id and setup_vector, as well as the number of expected CPUs, will be needed outside of PSCI during future refactoring work. This patch puts them into utils.S, and moves the number of CPUs one level up, in a macro defined by the Makefile. Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2016-06-14Move all sources to arch-specific folderJean-Philippe Brucker10-10/+11
This patch moves all assembly to arch/aarch64. Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2016-06-14Make the linker script more genericJean-Philippe Brucker3-27/+34
Attempt to make the linker script more flexible, by removing explicit object names. We move boot code into a ".init" section, and let ld freely reorganize the rest. Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2016-06-14Clean up image layoutJean-Philippe Brucker7-16/+13
This patch moves page tables and vectors to their own section, in order to avoid big alignment gaps in the middle of .text or .data. We also remove all .org directives, as they are not needed. Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2016-06-14Pass object files on the ld command lineJean-Philippe Brucker2-10/+6
The 32-bit linker struggles with INPUT directives in linker scripts, and tends to include the whole ELF files instead of merging their sections. Remove INPUT for object files and pass them as arguments to ld instead. Also sneakily remove the orphan "BOOTLOADER" variable from Makefile.am, since we're cleaning things up. It hasn't been used for a while. Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2016-06-14Clean up PSCI function IDsJean-Philippe Brucker2-4/+4
The boot-wrapper allows to boot secondary CPUs through a PSCI interface. This implementation is incomplete, and only understands two SMC calls, CPU_ON and CPU_OFF. Since PSCI versions >=0.2 require to implement a few more functions (VERSION, SUSPEND, SYSTEM_OFF...), we implement PSCI 0.1, which doesn't specify what SMC numbers to use. An implementation needs to advertise its SMC numbers to the kernel through device-tree nodes. Our current SMC numbers are inconsistent with the rest of the world: | B-W (0.1) | U-boot (0.1) | v0.2 ---------------+--------------+--------------+-------------- CPU_OFF | 0x84000001 | 0x95c1ba5f | 0x84000002 64-bit CPU_ON | 0x84000002 | 0x95c1ba60 | 0xc4000003 This is a problem when testing systems like Jailhouse, that currently don't read the device-tree but hard-code PSCI IDs. To align with the rest of the world, switch to PSCI 0.2 IDs. Note: this patch does *not* add PSCI 0.2 compatibility to the boot-wrapper. We still advertise as 0.1. Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2014-11-06bootwrapper: improve UART initialisationAndre Przywara1-3/+9
The PL011 spec requires that baud rate settings should be done by writing both xBRD registers followed by a write to LCR_H (which we skipped so far completely).[1] So include the FBRD register write as well and set up the LCR_H register to initialise the UART to 8N1. Also skip the automatic RTS/CTS enablement, as this may not be used by the peer (and the generic UART does not have it at all). [1] ARM PL011 TRM, 3.3.7 (top of page 3-14) Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2014-11-06Set sctlr_el2 to predefined state for all CPUsVladimir Murzin4-2/+11
Currently, sctlr_el2 is initialised only in the cold boot path, and even then we didn't set the RES1 bits. So we're lucky the cold boot path ever worked given most of the bits are UNKNOWN. Lack of initialisation in the hot boot path leads to kernel crash while CPU is hot-plugging and KVM is enabled: root@genericarmv8:~# echo 0 > /sys/devices/system/cpu/cpu1/online kvm: disabling virtualization on CPU1 CPU1: shutdown root@genericarmv8:~# echo 1 > /sys/devices/system/cpu/cpu1/online Kernel panic - not syncing: HYP panic: PS:000003c9 PC:0000000080002394 ESR:0000000086000005 FAR:0000000080002394 HPFAR: (null) PAR: (null) VCPU: (null) CPU: 1 PID: 0 Comm: swapper/1 Not tainted 3.16.0-rc1+ #162 Call trace: [<ffffffc0000880d8>] dump_backtrace+0x0/0x12c [<ffffffc000088214>] show_stack+0x10/0x1c [<ffffffc000472680>] dump_stack+0x74/0xc4 [<ffffffc00046f8ec>] panic+0xe4/0x21c [<ffffffc00046f804>] mmu_memory_cache_alloc.part.25+0x34/0x38 [<ffffffc00008a26c>] cpu_psci_cpu_die+0x20/0x40 [<ffffffc00008e95c>] cpu_die+0x40/0x70 [<ffffffc0000852e0>] arch_cpu_idle_dead+0x8/0x14 [<ffffffc0000dca4c>] cpu_startup_entry+0x144/0x14c [<ffffffc00008e7f0>] secondary_start_kernel+0x118/0x128 Initialise sctlr_el2 in the reset value just before dropping from EL3 for psci and spin-table boot protocols. Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2014-11-06boot-wrapper: arm64: gicv3: skip GIC init if not availableMarc Zyngier1-0/+11
Rather than exploding very early on, just skip the GICv3 initialization if no GICv3 CPU interface is reported available. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> [Mark: amend comment] Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2014-06-18configure: Fixes for --enable-xxxGeoff Levand1-6/+4
When the --enable-psci=no or --enable-gicv3=no form of configure option was passed our configure script was setting the option to yes. This changes the logic slightly to fix the problem. Signed-off-by: Geoff Levand <geoff@infradead.org> [Mark: fit with exiting USE_FEATURE naming scheme, fix whitespace] Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2014-06-18Makefile: Add local perl module include pathGeoff Levand1-7/+7
We recently added perl scripting to our makefile, but omitted adding the include path of the local modules in the invocation of perl. Fixes build errors like these when building out of the source tree: Can't locate FDT.pm in @INC (you may need to install the FDT module) Signed-off-by: Geoff Levand <geoff@infradead.org> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2014-05-09boot-wrapper: arm64: add support for GICv3Marc Zyngier4-9/+117
Performs the minimal initialization required for GICv3 support. Support can be enabled with --enable-gicv3. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2014-05-09.gitignore: add auto-generated `compile' fileWill Deacon1-0/+1
Seems that something in autotools spits out a `compile' script, so add this to .gitignore. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2014-04-15Allow DTB to be overriddenMark Rutland1-6/+12
Some platforms differ significantly enough from the RTSM VE platform such the RTSM VE DTB is not a valid DTB for the platform. Now that we have the appropriate logic for detecting device and memory base addresses, there's no reason we can't allwo the user to arbittrarily choose to use another DTB so long as the basics are present (memory, a pl011, and V2M sysregs). This patch adds a "--with-dtb" option to override the DTB to use. The aformentioned base addresses are automatically dicovered at build time. Where a required device is not present, the build will fail. Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2014-04-15Discover memory from the DTBMark Rutland2-1/+34
In case the start of physical memory happens to be different on some model variant, this patch adds the necessary tooling to detect the base address of said memory and ensure that the kernel and wrapper get loaded at appropriate addresses. Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2014-04-15Discover device base addresses from the DTBMark Rutland2-4/+46
The base addresses of various components can differ from one model to another. As these addresses are currently hard-coded in the bootwrapper, it is necessary to manually alter the bootwrapper for each variation. This patch adds scripting to extract the (absolute / CPU) addresses of various system components. With this change the bootwrapper build system will automatically discover the addresses that need to be used. Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2014-04-15Add FDT perl moduleMark Rutland1-0/+482
There are various models (RTSM VE, FVP Base, Foundation) which the booterapper is intended to function on, but differences between these (be they static or configurable) are difficult to handle as the bootwrapper currently has hard-coded base addresses. We already have a platform description (the device tree blob) which must contain the correct addresses for a real OS to function, and it would be nice if we could extract the values out of the device tree rather than redundantly describing them in the boot wrapper. This patch adds a pure perl library for parsing and querying values from a device tree blob. Scripts may use this library to extract addresses and other values from the DT. Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2014-04-07Fix maintainer-clean make targetGeoff Levand1-0/+3
Add the missing MAINTAINERCLEANFILES to makefile.am. Signed-off-by: Geoff Levand <geoff@infradead.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-03-20cache.S: fix misleading commentsMark Rutland1-2/+2
A couple of comments in cache.S are misleading. While they do not affect the correctness of the code they do make it somewhat difficult to reason about it: CSSIDR_EL1[12:3] contains the associativity field, which is enconded as one less than the total number of ways, (matching the maximum way index) so the comment on line 40 is wrong. Counting the leading zeros on a 32-bit register with the extracted associativity field results in 32 - ceil(log2(max way index)), rather than log2(ways) rounded down. Thus the comment on line 41 is also wrong. This patch adjusts both comments to better reflect the code. Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2014-03-20fix SetWay bits alignment for DC opVladimir Murzin1-2/+2
Althought comment is aligned with ARMv8 ARM implentation is different. In fact, "set" is shifted by "shift" and "way" is shifted by "line size". Correct this missalignment. Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2014-03-12Modify cpu nodes to set the enable-methodMatthew Leach2-2/+26
When using PSCI, the enable-method property for each CPU node in the DTB needs to be set to "psci". Add a script and Makefile.am rules so that this is done automatically for the final pass through DTC. Signed-off-by: Matthew Leach <matthew.leach@arm.com> [Mark: remove backticks, fix copyright date, use $(), fix indentation] Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2014-03-12If enabled, add the PSCI node to the FDTMatthew Leach1-1/+8
PSCI requires a node to be inserted into the FDT. Do this for the user automatically if PSCI is enabled. Signed-off-by: Matthew Leach <matthew.leach@arm.com> [Mark: add missing "method" property, fix indentation] Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2014-03-12Allow the passing of CPUIDs in the configure scriptMatthew Leach2-1/+7
Add the --with-cpu-ids switch to the configure script to allow the user to manually set the CPU IDs that are passed to PSCI. Signed-off-by: Matthew Leach <matthew.leach@arm.com> [Mark: fix indentation] Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2014-03-12Check for dtc in the kernel dirMatthew Leach1-1/+1
The dtc tool should also be checked for in the $KERN_DIR/scripts/dtc directory as it is shipped with Linux. Signed-off-by: Matthew Leach <matthew.leach@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2014-03-12Add a PSCI configure optionMatthew Leach2-0/+16
The boot-wrapper can be build with or without support for PSCI. Therefore add that as a configure option (which defaults to not using PSCI) and set the appropriate options in the makefile. Signed-off-by: Matthew Leach <matthew.leach@arm.com> [Mark: fix indentation] Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2014-03-12Add autotools configuration.Matthew Leach4-41/+112
This patch adds a basic auto-tools configuration environment for the bootwrapper consisting of the configure.ac file and the Makefile.am file. The configure.ac file includes several options and checks: - Ensure that an AArch64 compiler is used. - Add the mandatory --with-kernel-dir option that sets KERN_DIR. - Check that the correct base dtb file exists in KERN_DIR. - Add an option, --with-initrd, that allows a user to specify an initrd file to embed in the image. - Check for a working dtc and set DTC to the full-path to the executable. - Create the necessary symbolic links to the relevant kernel files. The Makefile.am file includes several changes: - Use a prebuilt dtb rather than a dts, which is decompiled to inject the chosen node. - Use the configured compiler tool names. - Use the configured SED program rather than assuming it is in PATH. Signed-off-by: Matthew Leach <matthew.leach@arm.com> [Mark: use dtb, add options, fix style issues, remove src/] Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2014-02-04Merge branch 'master' of ↵Mark Rutland1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/boot-wrapper-aarch64.git Unify upstream build system updates and PSCI support. Conflicts: Makefile Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2013-12-17Add CFLAGS to makefile compileGeoff Levand1-1/+1
From 8a5783e72029c1ecd26fb99130b48a470e13a8da Mon Sep 17 00:00:00 2001 From: Geoff Levand <geoff@infradead.org> Date: Wed, 13 Nov 2013 12:26:01 -0800 Allow user to pass compiler flags on the make command line as in 'make CFLAGS="-g"'. Signed-off-by: Geoff Levand <geoff@infradead.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-08-14cache.S: fix max cache level detectionMark Rutland1-1/+1
Due to incorrect operands for an and, we treat the value of the Ctype1 field of clidr_el1 as if it were the LoC field. Fix up the operands so we use LoC corretly. Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2013-06-05Add simple PSCI implementationMark Rutland4-3/+415
This patch adds a simple PSCI implementation, only supporting CPU_ON and CPU_OFF. As this does not communicate with any hardware power controller (yet), CPUs spin in an internal pen, with a wfe to limit their polling speed. While the model brings up CPUs with caches invalidated, we enable caches and the MMU to allow the use of exclusive operations in the bootwrapper, and thus the cache may allocate entries while in EL3. As PSCI requires that caches are invalid when executing from a CPU_ON entry point, the caches must be cleaned and invalided when we drop to EL2. This cleaning is performed in a shim in EL2 as this is simpler than enabling/disabling caches and the MMU on each SMC. The list of all CPU IDs (MPIDRS with non-aff bits masked out) in the system must be provided in the Makefile as the comma-separated list CPU_IDs, to enable the bootwrapper to differentiate CPUs and provide the correct error messages if for example the OS attempts to power on a CPU multiple times. If this list does not match the CPUs present, it may not be possible to bring some CPUs online, and the PSCI implementation may erroneously acknowledge power on requests for non-existent CPUs. Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2013-06-05Add code to clean and invalidate cachesMark Rutland3-2/+85
Linux expects to be handed a system with caches disabled and invalidated. While the model currently brings CPUs up with caches invalidated, we'll need to invalidate caches when leaving the bootwrapper if we enable them within the bootwrapper (e.g. for the use of exclusive operations), as lines may be allocated. This patch adds code to invalidate the dcaches and icaches. It is not yet called. Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2013-06-05Factor spin-table into its own fileMark Rutland4-42/+66
This patch factors out the spin-table boot protocol into its own file, leaving boot.S to do all of the required EL3 initialisation, and calling upon ns_init to perform EL2 initialisation. Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2013-06-05Factor out secure GIC initialisationMark Rutland4-28/+54
Currently the bootwrapper still lumps together logically distinct pieces of hardware initialisation, making porting to new platforms or adding new features difficult. It would be nicer if we could separate some of the functional units to make the code clearer and easier to extend. To this end, this patch factors the secure GIC initialisation into its own file. Additionally, the code is modified to route all interrupts to the non-secure side, not just the first 64. Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2013-06-05Factor non-secure system initialisationMark Rutland4-19/+46
When we add PSCI, we'll want to share the same non-secure sysetem initialisation code. As we're going to want to put spin-table and PSCI implementations in separate files, it would be nice to have the initialisation code in its own file, to make clear the separation between early boot, platform interface code, and non-secure system initialisation. Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2013-06-05Test all MPIDR affinity bitsMark Rutland2-2/+6
Currently we only test the Aff0 bits of the MPIDR to determine the 'primary' CPU. In multi-cluster systems, MPIDR.Aff{3,2,1} may not be zero, and there may by multiple CPUs where MPIDR.Aff0 is zero. In these systems we might determine that two cpus are the primary CPU. This patch adds a MPIDR_ID_BITS mask, and uses it in all cases we test the MPIDR, making this safe for multi-cluster systems. This doesn't bring full support for multi-cluster systems, however, as they may require additional hardware to be set up (e.g. CCI). Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2013-06-05Allow support of multiple assembly filesMark Rutland1-2/+8
To support more complex functionality, it would be nice if we could separate bits of the boot code into separate files. This patch refactors the Makefile, allowing us to add more source files later without having to add a new rule for each file. The defines we pass to each object are also factored into separate lines for easier modification in future. Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2013-06-05Add CURRENTEL_EL3 #defineMark Rutland2-1/+3
Add a CURRENTEL_EL3 #define to make tests against the value of CurrentEL clearer. Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2013-06-05Move EL drop definition out of boot.SMark Rutland2-4/+30
PSCI needs to be able to drop cores to EL2 repeatedly, and it doesn't make sense to always throw CPUs through the original boot path. This patch changes the EL drop into a macro, and moves it to a common file that can be used by different boot protocol / service implementations. While doing so, the SPSR value used is split out to be more legible. Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2013-06-05gitignore: ignore build filesMark Rutland1-2/+6
Currently. we don't ignore several files produced during the build in the .gitignore, which can make the output of git status very noisy. Let's ignore all of the external dependencies we might add to the source directory (dtc, *.dts{i,}, *.cpio.gz), and all of the files we'll produce during the build (*.o, *.axf). Ignoring the general case of all of these files should produce less churn in .gitignore in future, and we can always add special exemptions if required. Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2013-06-05Use immediate offsets rather than post-incrementMark Rutland1-3/+3
When we set the GICD_IGROUPRn registers, we have a dangling post-increment at the end which is never useful, being overwritten in every path. As we're only writing to 3 registers, the offsets of which can be represented in immediates, use movs with immediate offsets to perform the writes. Reported-by: Nigel Stephens <nigel.stephens@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2013-06-05Remove unnecessary ldr from boot wrapperMark Rutland1-1/+0
We currently do an ldr from GICC_CTLR to w0, then immediately overwrite w0 with a mov. Reading the GICC_CTLR has no effect on the state of the GIC, so there's no reason to do the ldr. It's also inconsistent with the way we set the GICD_CTLR. Fix this. Signed-off-by: Mark Rutland <mark.rutland@arm.com>
2013-04-18Allow CROSS_COMPILE override on the make command lineChristoffer Dall1-1/+1
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-01-10Update READMEMatthew Leach1-2/+2
Change the DT files that are required as they have been re-named in the kernel. Signed-off-by: Matthew Leach <matthew.leach@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-01-09Tidy up the kernel boot argumentsCatalin Marinas1-2/+4
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-01-09Enable the CLCD outputCatalin Marinas2-1/+10
This patch is to avoid setting the MUXFPGA configuration in the platform code in the kernel. On real hardware, this function is handled by the boot monitor. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-01-09Change the FDT_SRC file to rtsm_ve-aemv8a.dtsCatalin Marinas1-1/+1
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-01-09Use the DTC Power(TM) instead of sed to inject the chosen nodePawel Moll1-4/+3
Signed-off-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2012-09-12Initial version of the AArch64 Linux boot wrapperCatalin Marinas6-0/+280
This boot wrapper contains the code for initialising the ARMv8 software model before the Linux kernel can run (see Documentation/arm64/booting.txt in the kernel tree for the Linux booting requirements). Running "make" creates a "linux-system.axf" ELF file that can be loaded by the software model. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>