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| author | Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> | 2019-05-16 16:12:43 +0530 |
|---|---|---|
| committer | Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> | 2019-08-03 17:51:21 +0530 |
| commit | ca33f735b1195e9bafaa66f24dec40ea666e9840 (patch) | |
| tree | d4f51f39e1deb1ce114e389518be3dbbdb4c98c6 | |
| parent | 7d545e779a982d0b96939611db1bd8004f926ade (diff) | |
| download | linux-bitmain-bitmain-5.4.tar.gz | |
arm64: dts: bitmain: Modify pin controller memory mapbitmain-soc-5.4bitmain-5.4
Earlier, the PWM registers were included as part of the pinctrl memory
map, but this turned to be useless as the muxing is being handled by the
SoC pin controller itself. Hence, this commit removes the pwm register
mapping from the pinctrl node to make it more clean.
Fixes: af2ff87de413 ("arm64: dts: bitmain: Add pinctrl support for BM1880 SoC")
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
| -rw-r--r-- | arch/arm64/boot/dts/bitmain/bm1880.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/bitmain/bm1880.dtsi b/arch/arm64/boot/dts/bitmain/bm1880.dtsi index cfa59a30bad48b..d65453f99a993a 100644 --- a/arch/arm64/boot/dts/bitmain/bm1880.dtsi +++ b/arch/arm64/boot/dts/bitmain/bm1880.dtsi @@ -89,9 +89,9 @@ #size-cells = <1>; ranges = <0x0 0x0 0x50010000 0x1000>; - pinctrl: pinctrl@50 { + pinctrl: pinctrl@400 { compatible = "bitmain,bm1880-pinctrl"; - reg = <0x50 0x4B0>; + reg = <0x400 0x120>; }; rst: reset-controller@c00 { |