diff options
Diffstat (limited to 'queue-2.6.32/drm-radeon-kms-fix-msi-re-arm-on-rv370.patch')
| -rw-r--r-- | queue-2.6.32/drm-radeon-kms-fix-msi-re-arm-on-rv370.patch | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/queue-2.6.32/drm-radeon-kms-fix-msi-re-arm-on-rv370.patch b/queue-2.6.32/drm-radeon-kms-fix-msi-re-arm-on-rv370.patch new file mode 100644 index 0000000..ca2dbaf --- /dev/null +++ b/queue-2.6.32/drm-radeon-kms-fix-msi-re-arm-on-rv370.patch @@ -0,0 +1,50 @@ +From b7f5b7dec3d539a84734f2bcb7e53fbb1532a40b Mon Sep 17 00:00:00 2001 +From: Alex Deucher <alexander.deucher@amd.com> +Date: Mon, 13 Feb 2012 16:36:34 -0500 +Subject: drm/radeon/kms: fix MSI re-arm on rv370+ + +From: Alex Deucher <alexander.deucher@amd.com> + +commit b7f5b7dec3d539a84734f2bcb7e53fbb1532a40b upstream. + +MSI_REARM_EN register is a write only trigger register. +There is no need RMW when re-arming. + +May fix: +https://bugs.freedesktop.org/show_bug.cgi?id=41668 + +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Dave Airlie <airlied@redhat.com> +Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> + +--- + drivers/gpu/drm/radeon/r100.c | 4 +--- + drivers/gpu/drm/radeon/rs600.c | 4 +--- + 2 files changed, 2 insertions(+), 6 deletions(-) + +--- a/drivers/gpu/drm/radeon/r100.c ++++ b/drivers/gpu/drm/radeon/r100.c +@@ -218,9 +218,7 @@ int r100_irq_process(struct radeon_devic + WREG32(RADEON_AIC_CNTL, msi_rearm | RS400_MSI_REARM); + break; + default: +- msi_rearm = RREG32(RADEON_MSI_REARM_EN) & ~RV370_MSI_REARM_EN; +- WREG32(RADEON_MSI_REARM_EN, msi_rearm); +- WREG32(RADEON_MSI_REARM_EN, msi_rearm | RV370_MSI_REARM_EN); ++ WREG32(RADEON_MSI_REARM_EN, RV370_MSI_REARM_EN); + break; + } + } +--- a/drivers/gpu/drm/radeon/rs600.c ++++ b/drivers/gpu/drm/radeon/rs600.c +@@ -270,9 +270,7 @@ int rs600_irq_process(struct radeon_devi + WREG32(RADEON_BUS_CNTL, msi_rearm | RS600_MSI_REARM); + break; + default: +- msi_rearm = RREG32(RADEON_MSI_REARM_EN) & ~RV370_MSI_REARM_EN; +- WREG32(RADEON_MSI_REARM_EN, msi_rearm); +- WREG32(RADEON_MSI_REARM_EN, msi_rearm | RV370_MSI_REARM_EN); ++ WREG32(RADEON_MSI_REARM_EN, RV370_MSI_REARM_EN); + break; + } + } |