diff options
| author | Qiao Zhou <zhouqiao@marvell.com> | 2012-09-06 16:54:28 +0800 |
|---|---|---|
| committer | Lubomir Rintel <lkundrak@v3.sk> | 2019-07-22 19:39:59 +0200 |
| commit | 77d0d25847128fe8628f9d56959cc21d8579a0d5 (patch) | |
| tree | 91c4c748fe32f3c987ff57941297463636a9f106 | |
| parent | 1cccc9340b6b517f098068783d9621a274758ecd (diff) | |
| download | linux-mmp3-dell-ariel-77d0d25847128fe8628f9d56959cc21d8579a0d5.tar.gz | |
ASoC: enable classD reg handle for pxa988
class D registers are also necessary for pxa988, so enable related
register handling. otherwise, it will cause error for audio server.
Change-Id: Ic418d9bfafd3037f3590c09dc72e5a6eb48a1cdc
Signed-off-by: Qiao Zhou <zhouqiao@marvell.com>
| -rw-r--r-- | sound/soc/codecs/88pm805-codec.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/sound/soc/codecs/88pm805-codec.c b/sound/soc/codecs/88pm805-codec.c index bf1be2d8b4e961..0f77cf7af959fb 100644 --- a/sound/soc/codecs/88pm805-codec.c +++ b/sound/soc/codecs/88pm805-codec.c @@ -68,7 +68,7 @@ static unsigned int pm805_read_reg_cache(struct snd_soc_codec *codec, return cache[reg]; i2c = chip->pm805_chip->client; -#ifdef CONFIG_CPU_PXA978 +#if defined(CONFIG_CPU_PXA978) || defined(CONFIG_CPU_PXA988) if (chip->base_page && reg >= PM800_CLASS_D_INDEX) { reg = reg - PM800_CLASS_D_INDEX + PM800_CLASS_D_REG_BASE; i2c = chip->base_page; @@ -94,7 +94,7 @@ static int pm805_write_reg_cache(struct snd_soc_codec *codec, cache[reg] = (unsigned char)value; i2c = chip->pm805_chip->client; -#ifdef CONFIG_CPU_PXA978 +#if defined(CONFIG_CPU_PXA978) || defined(CONFIG_CPU_PXA988) if (chip->base_page && reg >= PM800_CLASS_D_INDEX) { reg = reg - PM800_CLASS_D_INDEX + PM800_CLASS_D_REG_BASE; i2c = chip->base_page; @@ -280,7 +280,7 @@ static const struct snd_kcontrol_new pm805_audio_controls[] = { SOC_SINGLE("PM805_CODEC_FLL_SPREAD_SPECTRUM_2", PM805_CODEC_FLL_SPREAD_SPECTRUM_2, 0, 0xff, 0), SOC_SINGLE("PM805_CODEC_FLL_SPREAD_SPECTRUM_3", PM805_CODEC_FLL_SPREAD_SPECTRUM_3, 0, 0xff, 0), SOC_SINGLE("PM805_CODEC_FLL_STS", PM805_CODEC_FLL_STS, 0, 0xff, 0), -#ifdef CONFIG_CPU_PXA978 +#if defined(CONFIG_CPU_PXA978) || defined(CONFIG_CPU_PXA988) SOC_SINGLE("PM800_CLASS_D_1", PM800_CLASS_D_1, 0, 0xff, 0), SOC_SINGLE("PM800_CLASS_D_2", PM800_CLASS_D_2, 0, 0xff, 0), SOC_SINGLE("PM800_CLASS_D_3", PM800_CLASS_D_3, 0, 0xff, 0), @@ -507,7 +507,7 @@ static int pm805_probe(struct snd_soc_codec *codec) ret); goto out; } -#ifdef CONFIG_CPU_PXA978 +#if defined(CONFIG_CPU_PXA978) || defined(CONFIG_CPU_PXA988) if (chip->base_page) { ret = pm80x_bulk_read(chip->base_page, PM800_CLASS_D_REG_BASE, CODEC_TOTAL_REG_SIZE - PM805_CODEC_REG_SIZE, |