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-rw-r--r--include/asm-sh/hd64461.h23
1 files changed, 23 insertions, 0 deletions
diff --git a/include/asm-sh/hd64461.h b/include/asm-sh/hd64461.h
index 8c1353baf00f8e..1fb26f0ab1b501 100644
--- a/include/asm-sh/hd64461.h
+++ b/include/asm-sh/hd64461.h
@@ -225,6 +225,29 @@
#define HD64461_NIRR (CONFIG_HD64461_IOBASE + 0x5000)
#define HD64461_NIMR (CONFIG_HD64461_IOBASE + 0x5002)
+#define HD64461_TMU_TCR0 (CONFIG_HD64461_IOBASE + 0x600a)
+#define HD64461_TMU_TIRR (CONFIG_HD64461_IOBASE + 0x600c)
+#define HD64461_TMU_TIDR (CONFIG_HD64461_IOBASE + 0x600e)
+
+/* Timer Control Register */
+#define HD64461_TMU_TCR_EADT 0x10 /* Enable Signal */
+#define HD64461_TMU_TCR_ENABLE 0x08 /* Enable timer output */
+#define HD64461_TMU_TCR_SCL1 0x06 /* 1:1 */
+#define HD64461_TMU_TCR_SCL4 0x04 /* 1:4 */
+#define HD64461_TMU_TCR_SCL8 0x02 /* 1:8 */
+#define HD64461_TMU_TCR_STRT 0x01 /* Start Counting */
+#define HD64461_TMU_TCR_SCL16 0x00 /* 1:16 */
+
+/* Timer Control Adresses */
+#define HD64461_TMU_TCVR0 (CONFIG_HD64461_IOBASE + 0x6002)
+
+/* Timer Interrupt Request Register */
+#define HD64461_TMU_TIRR_TMU1 0x02
+#define HD64461_TMU_TIRR_TMU0 0x01
+
+#define HD64461_TMU_TIMR_TMU1 0x02
+#define HD64461_TMU_TIMR_TMU0 0x01
+
#define HD64461_IRQBASE OFFCHIP_IRQ_BASE
#define OFFCHIP_IRQ_BASE 64
#define HD64461_IRQ_NUM 16