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authorRyo Kataoka <ryo.kataoka.wt@renesas.com>2019-03-22 20:50:44 +0900
committerRyo Kataoka <ryo.kataoka.wt@renesas.com>2019-03-22 20:50:44 +0900
commitd21be5eb5cfce69bc73e07141904024853b62ca8 (patch)
tree59cc63736852b81ad71402078a3b8c2fb879ef9e
parentc3cbd3684e52686f65a24baa9ea5803c557c4d67 (diff)
parentf3f36384af2aad6e7a7279b62297ddf618e8296c (diff)
downloadrenesas-bsp-v4.14.75-ltsi/rcar-3.9.3.tar.gz
Merge branch 'rcar-3.9.2/dts-rcar-gen3.rc4' into v4.14.75-ltsi/rcar-3.9.3rcar-3.9.3v4.14.75-ltsi/rcar-3.9.3
* rcar-3.9.2/dts-rcar-gen3.rc4: arm64: dts: r8a77990-ebisu{,-es10}: Add no-sdio and no-sd properties to SDHI3 arm64: dts: salvator-common: Add no-sdio and no-sd properties to SDHI2 arm64: dts: r8a77990: Enable IPMMU-DS1 and IPMMU-MM arm64: dts: r8a77965: Enable IPMMU-DS1 and IPMMU-MM arm64: dts: r8a7796: Enable IPMMU-DS1 and IPMMU-MM arm64: dts: r8a7795: Enable IPMMU-DS1 and IPMMU-MM arm64: dts: r8a77990: Connect SDHI to IPMMU-DS1 arm64: dts: r8a77965: Connect SDHI to IPMMU-DS1 arm64: dts: r8a7796: Connect SDHI to IPMMU-DS1 arm64: dts: r8a7795: Connect SDHI to IPMMU-DS1 Revert "arm64: dts: renesas: r8a7795: Tie Audio-DMAC to IPMMU-MP0/1" Revert "arm64: dts: renesas: r8a7796: Tie Audio-DMAC to IPMMU-MP" Revert "arm64: dts: renesas: r8a7795: Tie SYS-DMAC to IPMMU-DS0/1" Revert "arm64: dts: renesas: r8a7796: Tie SYS-DMAC to IPMMU-DS0/1" Revert "arm64: dts: renesas: r8a77965: Attach the SYS-DMAC to the IPMMU" Revert "arm64: dts: renesas: r8a77990: Attach the SYS-DMAC to the IPMMU" Revert "arm64: dts: r8a77965: Tie Audio-DMAC to IPMMU-MP" Revert "arm64: dts: r8a77990: Tie Audio-DMAC to IPMMU-MP" arm64: dts: r8a7796-m3ulcb: Select the device tree of R-Car M3 ES1.x. arm64: dts: r8a77965-m3nulcb: Fix source clock for DU arm64: dts: r8a77965-m3nulcb: Add VSPM I/F driver node arm64: dts: r8a77965-m3nulcb: Add MMNGRBUF driver node arm64: dts: r8a77965-m3nulcb: Add MMNGR support arm64: dts: r8a77965-m3nulcb: Add reserved mem for MMNGR arm64: dts: renesas: r8a77965: m3nulcb: Initial device tree dt-bindings: arm: Document Renesas R-Car M3-N-based ULCB board arm64: dts: r8a7796: Add support for R-Car M3 ES3.0 arm64: dts: r8a77965: Fix power domain for FCPCS arm64: dts: r8a77990: Fix SCIF5 DMA channels arm64: dts: r8a7795: Fix clock, reset and power domain for iVDP1C
-rw-r--r--Documentation/devicetree/bindings/arm/shmobile.txt2
-rw-r--r--arch/arm64/boot/dts/renesas/Makefile1
-rw-r--r--arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi46
-rw-r--r--arch/arm64/boot/dts/renesas/r8a7795.dtsi54
-rw-r--r--arch/arm64/boot/dts/renesas/r8a7796-es1.dtsi33
-rw-r--r--arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts6
-rw-r--r--arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts8
-rw-r--r--arch/arm64/boot/dts/renesas/r8a7796-salvator-xs-2x4g.dts134
-rw-r--r--arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dts8
-rw-r--r--arch/arm64/boot/dts/renesas/r8a7796.dtsi69
-rw-r--r--arch/arm64/boot/dts/renesas/r8a77965-m3nulcb.dts88
-rw-r--r--arch/arm64/boot/dts/renesas/r8a77965.dtsi48
-rw-r--r--arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts2
-rw-r--r--arch/arm64/boot/dts/renesas/r8a77990-es10-ebisu.dts2
-rw-r--r--arch/arm64/boot/dts/renesas/r8a77990.dtsi44
-rw-r--r--arch/arm64/boot/dts/renesas/salvator-common.dtsi2
16 files changed, 329 insertions, 218 deletions
diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt
index 3965ce3f356604..9becc1ab65b42c 100644
--- a/Documentation/devicetree/bindings/arm/shmobile.txt
+++ b/Documentation/devicetree/bindings/arm/shmobile.txt
@@ -107,6 +107,8 @@ Boards:
compatible = "renesas,lager", "renesas,r8a7790"
- M3ULCB (R-Car Starter Kit Pro, RTP0RC7796SKBX0010SA09 (M3 ES1.0))
compatible = "renesas,m3ulcb", "renesas,r8a7796"
+ - M3NULCB (R-Car Starter Kit Pro, RTP0RC77965SKBX010SA00 (M3-N ES1.1))
+ compatible = "renesas,m3nulcb", "renesas,r8a77965"
- Marzen (R0P7779A00010S)
compatible = "renesas,marzen", "renesas,r8a7779"
- Porter (M2-LCDP)
diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index c8f2891e38ca6a..b9f6bf07ac0178 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -12,6 +12,7 @@ dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-kf.dtb
dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-xs.dtb
dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-xs-2x4g.dtb
dtb-$(CONFIG_ARCH_R8A77965) += r8a77965-salvator-x.dtb r8a77965-salvator-xs.dtb
+dtb-$(CONFIG_ARCH_R8A77965) += r8a77965-m3nulcb.dtb
dtb-$(CONFIG_ARCH_R8A77970) += r8a77970-eagle.dtb r8a77970-v3msk.dtb
dtb-$(CONFIG_ARCH_R8A77980) += r8a77980-condor.dtb r8a77980-v3hsk.dtb
dtb-$(CONFIG_ARCH_R8A77990) += r8a77990-ebisu.dtb
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
index 600f56c1be324d..9c160cd53cc279 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
@@ -2,7 +2,7 @@
/*
* Device Tree Source for the R-Car H3 (R8A77950) ES1.x SoC
*
- * Copyright (C) 2015 Renesas Electronics Corp.
+ * Copyright (C) 2015-2019 Renesas Electronics Corp.
*/
#include "r8a7795.dtsi"
@@ -50,6 +50,12 @@
/delete-node/ dma-controller@e6460000;
/delete-node/ dma-controller@e6470000;
+ ivdp1c: vcp4@fe8d0000 {
+ clocks = <&cpg CPG_MOD 128>;
+ power-domains = <&sysc R8A7795_PD_A2VC0>;
+ resets = <&cpg 128>;
+ };
+
vcp4@fe8f0000 {
compatible = "renesas,vcp4-vcpl4";
reg = <0 0xfe8f0000 0 0x200>, <0 0xfe8f0200 0 0x200>;
@@ -247,6 +253,14 @@
gpio-ranges = <&pfc 0 32 28>;
};
+&ipmmu_mm {
+ status = "disabled";
+};
+
+&ipmmu_ds1 {
+ status = "disabled";
+};
+
&ipmmu_vi0 {
renesas,ipmmu-main = <&ipmmu_mm 11>;
};
@@ -267,26 +281,20 @@
renesas,ipmmu-main = <&ipmmu_mm 7>;
};
-&audma0 {
- iommus = <&ipmmu_mp1 0>, <&ipmmu_mp1 1>,
- <&ipmmu_mp1 2>, <&ipmmu_mp1 3>,
- <&ipmmu_mp1 4>, <&ipmmu_mp1 5>,
- <&ipmmu_mp1 6>, <&ipmmu_mp1 7>,
- <&ipmmu_mp1 8>, <&ipmmu_mp1 9>,
- <&ipmmu_mp1 10>, <&ipmmu_mp1 11>,
- <&ipmmu_mp1 12>, <&ipmmu_mp1 13>,
- <&ipmmu_mp1 14>, <&ipmmu_mp1 15>;
+&sdhi0 {
+ /delete-property/ iommus;
+};
+
+&sdhi1 {
+ /delete-property/ iommus;
+};
+
+&sdhi2 {
+ /delete-property/ iommus;
};
-&audma1 {
- iommus = <&ipmmu_mp1 16>, <&ipmmu_mp1 17>,
- <&ipmmu_mp1 18>, <&ipmmu_mp1 19>,
- <&ipmmu_mp1 20>, <&ipmmu_mp1 21>,
- <&ipmmu_mp1 22>, <&ipmmu_mp1 23>,
- <&ipmmu_mp1 24>, <&ipmmu_mp1 25>,
- <&ipmmu_mp1 26>, <&ipmmu_mp1 27>,
- <&ipmmu_mp1 28>, <&ipmmu_mp1 29>,
- <&ipmmu_mp1 30>, <&ipmmu_mp1 31>;
+&sdhi3 {
+ /delete-property/ iommus;
};
&du {
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 1896e5250dffcf..cce15399e60ea1 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -2,7 +2,7 @@
/*
* Device Tree Source for the R-Car H3 (R8A77950) SoC
*
- * Copyright (C) 2015-2017 Renesas Electronics Corp.
+ * Copyright (C) 2015-2019 Renesas Electronics Corp.
*/
#include <dt-bindings/clock/r8a7795-cpg-mssr.h>
@@ -1367,14 +1367,6 @@
resets = <&cpg 219>;
#dma-cells = <1>;
dma-channels = <16>;
- iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
- <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
- <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
- <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
- <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
- <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
- <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
- <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
};
dmac1: dma-controller@e7300000 {
@@ -1409,14 +1401,6 @@
resets = <&cpg 218>;
#dma-cells = <1>;
dma-channels = <16>;
- iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
- <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
- <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
- <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
- <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
- <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
- <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
- <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
};
dmac2: dma-controller@e7310000 {
@@ -1451,14 +1435,6 @@
resets = <&cpg 217>;
#dma-cells = <1>;
dma-channels = <16>;
- iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
- <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
- <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
- <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
- <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
- <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
- <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
- <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
};
ipmmu_mm: mmu@e67b0000 {
@@ -1468,7 +1444,6 @@
<GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_ds0: mmu@e6740000 {
@@ -1486,7 +1461,6 @@
renesas,ipmmu-main = <&ipmmu_mm 1>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_hc: mmu@e6570000 {
@@ -2559,14 +2533,6 @@
resets = <&cpg 502>;
#dma-cells = <1>;
dma-channels = <16>;
- iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>,
- <&ipmmu_mp0 2>, <&ipmmu_mp0 3>,
- <&ipmmu_mp0 4>, <&ipmmu_mp0 5>,
- <&ipmmu_mp0 6>, <&ipmmu_mp0 7>,
- <&ipmmu_mp0 8>, <&ipmmu_mp0 9>,
- <&ipmmu_mp0 10>, <&ipmmu_mp0 11>,
- <&ipmmu_mp0 12>, <&ipmmu_mp0 13>,
- <&ipmmu_mp0 14>, <&ipmmu_mp0 15>;
};
audma1: dma-controller@ec720000 {
@@ -2601,14 +2567,6 @@
resets = <&cpg 501>;
#dma-cells = <1>;
dma-channels = <16>;
- iommus = <&ipmmu_mp0 16>, <&ipmmu_mp0 17>,
- <&ipmmu_mp0 18>, <&ipmmu_mp0 19>,
- <&ipmmu_mp0 20>, <&ipmmu_mp0 21>,
- <&ipmmu_mp0 22>, <&ipmmu_mp0 23>,
- <&ipmmu_mp0 24>, <&ipmmu_mp0 25>,
- <&ipmmu_mp0 26>, <&ipmmu_mp0 27>,
- <&ipmmu_mp0 28>, <&ipmmu_mp0 29>,
- <&ipmmu_mp0 30>, <&ipmmu_mp0 31>;
};
adsp: adsp@ec800000 {
@@ -2846,6 +2804,7 @@
max-frequency = <200000000>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
resets = <&cpg 314>;
+ iommus = <&ipmmu_ds1 32>;
status = "disabled";
};
@@ -2858,6 +2817,7 @@
max-frequency = <200000000>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
resets = <&cpg 313>;
+ iommus = <&ipmmu_ds1 33>;
status = "disabled";
};
@@ -2870,6 +2830,7 @@
max-frequency = <200000000>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
resets = <&cpg 312>;
+ iommus = <&ipmmu_ds1 34>;
status = "disabled";
};
@@ -2882,6 +2843,7 @@
max-frequency = <200000000>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
resets = <&cpg 311>;
+ iommus = <&ipmmu_ds1 35>;
status = "disabled";
};
@@ -3032,9 +2994,9 @@
interrupts = <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 128>;
- power-domains = <&sysc R8A7795_PD_A2VC0>;
- resets = <&cpg 128>;
+ clocks = <&cpg CPG_MOD 130>;
+ power-domains = <&sysc R8A7795_PD_A2VC1>;
+ resets = <&cpg 130>;
renesas,#ch = <2>;
renesas,#fcp_ch = <0>;
};
diff --git a/arch/arm64/boot/dts/renesas/r8a7796-es1.dtsi b/arch/arm64/boot/dts/renesas/r8a7796-es1.dtsi
new file mode 100644
index 00000000000000..db394c7e77335c
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a7796-es1.dtsi
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the R-Car M3 (R8A7796) ES1.x SoC
+ *
+ * Copyright (C) 2019 Renesas Electronics Corp.
+ */
+
+#include "r8a7796.dtsi"
+
+&soc {
+ fcpci0: vcp4@fe8df000 {
+ compatible = "renesas,vcp4-fcpci0";
+ reg = <0 0xfe8df000 0 0x200>;
+ clocks = <&cpg CPG_MOD 617>;
+ power-domains = <&sysc R8A7796_PD_A3VC>;
+ resets = <&cpg 617>;
+ renesas,#ch = <1>;
+ };
+
+ fcpcs: vcp4@fe90f000 {
+ power-domains = <&sysc R8A7796_PD_A3VC>;
+ };
+
+ ivdp1c: vcp4@fe8d0000 {
+ clocks = <&cpg CPG_MOD 128>;
+ power-domains = <&sysc R8A7796_PD_A2VC0>;
+ resets = <&cpg 128>;
+ };
+
+ vdpb: vcp4@fe900000 {
+ power-domains = <&sysc R8A7796_PD_A2VC0>;
+ };
+};
diff --git a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
index c962301b5f340d..ddb451b844488b 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
@@ -2,16 +2,16 @@
/*
* Device Tree Source for the M3ULCB (R-Car Starter Kit Pro) board
*
- * Copyright (C) 2016-2018 Renesas Electronics Corp.
+ * Copyright (C) 2016-2019 Renesas Electronics Corp.
* Copyright (C) 2016 Cogent Embedded, Inc.
*/
/dts-v1/;
-#include "r8a7796.dtsi"
+#include "r8a7796-es1.dtsi"
#include "ulcb.dtsi"
/ {
- model = "Renesas M3ULCB board based on r8a7796";
+ model = "Renesas M3ULCB board based on r8a7796 ES1.0";
compatible = "renesas,m3ulcb", "renesas,r8a7796";
cpus {
diff --git a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
index 02a938b416d0b9..cf92aa3939e318 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
@@ -1,16 +1,16 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Device Tree Source for the Salvator-X board with R-Car M3-W
+ * Device Tree Source for the Salvator-X board with R-Car M3-W ES1.x
*
- * Copyright (C) 2016 Renesas Electronics Corp.
+ * Copyright (C) 2016-2019 Renesas Electronics Corp.
*/
/dts-v1/;
-#include "r8a7796.dtsi"
+#include "r8a7796-es1.dtsi"
#include "salvator-x.dtsi"
/ {
- model = "Renesas Salvator-X board based on r8a7796";
+ model = "Renesas Salvator-X board based on r8a7796 ES1.x";
compatible = "renesas,salvator-x", "renesas,r8a7796";
memory@48000000 {
diff --git a/arch/arm64/boot/dts/renesas/r8a7796-salvator-xs-2x4g.dts b/arch/arm64/boot/dts/renesas/r8a7796-salvator-xs-2x4g.dts
index ceacc90e991ad7..664dc9250bbb76 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-xs-2x4g.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-xs-2x4g.dts
@@ -1,14 +1,16 @@
/*
- * Device Tree Source for the Salvator-X 2nd version board with R-Car M3 ES3.0
+ * Device Tree Source for the Salvator-X 2nd version board with R-Car M3 ES3.0+
*
- * Copyright (C) 2018 Renesas Electronics Corp.
+ * Copyright (C) 2018-2019 Renesas Electronics Corp.
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
-#include "r8a7796-salvator-xs.dts"
+/dts-v1/;
+#include "r8a7796.dtsi"
+#include "salvator-xs.dtsi"
/ {
model = "Renesas Salvator-X 2nd version board based on r8a7796 ES3.0+ with 8GiB (2 x 4 GiB)";
@@ -29,4 +31,130 @@
device_type = "memory";
reg = <0x6 0x00000000 0x1 0x00000000>;
};
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ /* device specific region for Lossy Decompression */
+ lossy_decompress: linux,lossy_decompress@54000000 {
+ no-map;
+ reg = <0x00000000 0x54000000 0x0 0x03000000>;
+ };
+
+ /* For Audio DSP */
+ adsp_reserved: linux,adsp@57000000 {
+ compatible = "shared-dma-pool";
+ reusable;
+ reg = <0x00000000 0x57000000 0x0 0x01000000>;
+ };
+
+ /* global autoconfigured region for contiguous allocations */
+ linux,cma@58000000 {
+ compatible = "shared-dma-pool";
+ reusable;
+ reg = <0x00000000 0x58000000 0x0 0x18000000>;
+ linux,cma-default;
+ };
+
+ /* device specific region for contiguous allocations */
+ mmp_reserved: linux,multimedia@70000000 {
+ compatible = "shared-dma-pool";
+ reusable;
+ reg = <0x00000000 0x70000000 0x0 0x10000000>;
+ };
+ };
+
+ mmngr {
+ compatible = "renesas,mmngr";
+ memory-region = <&mmp_reserved>, <&lossy_decompress>;
+ };
+
+ mmngrbuf {
+ compatible = "renesas,mmngrbuf";
+ };
+
+ vspm_if {
+ compatible = "renesas,vspm_if";
+ };
+};
+
+&adsp {
+ status = "okay";
+ memory-region = <&adsp_reserved>;
+};
+
+&du {
+ clocks = <&cpg CPG_MOD 724>,
+ <&cpg CPG_MOD 723>,
+ <&cpg CPG_MOD 722>,
+ <&versaclock6 1>,
+ <&x21_clk>,
+ <&versaclock6 2>;
+ clock-names = "du.0", "du.1", "du.2",
+ "dclkin.0", "dclkin.1", "dclkin.2";
+};
+
+&sound_card {
+ dais = <&rsnd_port0 /* ak4613 */
+ &rsnd_port1>; /* HDMI0 */
+};
+
+&hdmi0 {
+ status = "okay";
+
+ ports {
+ port@1 {
+ reg = <1>;
+ rcar_dw_hdmi0_out: endpoint {
+ remote-endpoint = <&hdmi0_con>;
+ };
+ };
+ port@2 {
+ reg = <2>;
+ dw_hdmi0_snd_in: endpoint {
+ remote-endpoint = <&rsnd_endpoint1>;
+ };
+ };
+ };
+};
+
+&hdmi0_con {
+ remote-endpoint = <&rcar_dw_hdmi0_out>;
+};
+
+&lvds0 {
+ ports {
+ port@1 {
+ lvds0_out: endpoint {
+ remote-endpoint = <&lvds_in>;
+ };
+ };
+ };
+};
+
+&rcar_sound {
+ ports {
+ /* rsnd_port0 is on salvator-common */
+ rsnd_port1: port@1 {
+ rsnd_endpoint1: endpoint {
+ remote-endpoint = <&dw_hdmi0_snd_in>;
+
+ dai-format = "i2s";
+ bitclock-master = <&rsnd_endpoint1>;
+ frame-master = <&rsnd_endpoint1>;
+
+ playback = <&ssi2>;
+ };
+ };
+ };
+};
+
+&vspb {
+ status = "okay";
+};
+
+&vspi0 {
+ status = "okay";
};
diff --git a/arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dts b/arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dts
index bd66be180d6d8a..7d39dc96ac8a87 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dts
@@ -1,16 +1,16 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Device Tree Source for the Salvator-X 2nd version board with R-Car M3-W
+ * Device Tree Source for the Salvator-X 2nd version board with R-Car M3-W ES1.x
*
- * Copyright (C) 2015-2017 Renesas Electronics Corp.
+ * Copyright (C) 2015-2019 Renesas Electronics Corp.
*/
/dts-v1/;
-#include "r8a7796.dtsi"
+#include "r8a7796-es1.dtsi"
#include "salvator-xs.dtsi"
/ {
- model = "Renesas Salvator-X 2nd version board based on r8a7796";
+ model = "Renesas Salvator-X 2nd version board based on r8a7796 ES1.x";
compatible = "renesas,salvator-xs", "renesas,r8a7796";
memory@48000000 {
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index c00d1da641987d..a40f9efbe69726 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -2,7 +2,7 @@
/*
* Device Tree Source for the R-Car M3-W (R8A77960) SoC
*
- * Copyright (C) 2016-2017 Renesas Electronics Corp.
+ * Copyright (C) 2016-2019 Renesas Electronics Corp.
*/
#include <dt-bindings/clock/r8a7796-cpg-mssr.h>
@@ -805,7 +805,7 @@
clock-frequency = <0>;
};
- soc {
+ soc: soc {
compatible = "simple-bus";
interrupt-parent = <&gic>;
#address-cells = <2>;
@@ -1327,14 +1327,6 @@
resets = <&cpg 219>;
#dma-cells = <1>;
dma-channels = <16>;
- iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
- <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
- <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
- <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
- <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
- <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
- <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
- <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
};
dmac1: dma-controller@e7300000 {
@@ -1369,14 +1361,6 @@
resets = <&cpg 218>;
#dma-cells = <1>;
dma-channels = <16>;
- iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
- <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
- <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
- <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
- <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
- <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
- <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
- <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
};
dmac2: dma-controller@e7310000 {
@@ -1411,14 +1395,6 @@
resets = <&cpg 217>;
#dma-cells = <1>;
dma-channels = <16>;
- iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
- <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
- <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
- <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
- <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
- <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
- <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
- <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
};
ipmmu_mm: mmu@e67b0000 {
@@ -1428,7 +1404,6 @@
<GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_ds0: mmu@e6740000 {
@@ -1446,7 +1421,6 @@
renesas,ipmmu-main = <&ipmmu_mm 1>;
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_hc: mmu@e6570000 {
@@ -2476,14 +2450,6 @@
resets = <&cpg 502>;
#dma-cells = <1>;
dma-channels = <16>;
- iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
- <&ipmmu_mp 2>, <&ipmmu_mp 3>,
- <&ipmmu_mp 4>, <&ipmmu_mp 5>,
- <&ipmmu_mp 6>, <&ipmmu_mp 7>,
- <&ipmmu_mp 8>, <&ipmmu_mp 9>,
- <&ipmmu_mp 10>, <&ipmmu_mp 11>,
- <&ipmmu_mp 12>, <&ipmmu_mp 13>,
- <&ipmmu_mp 14>, <&ipmmu_mp 15>;
};
audma1: dma-controller@ec720000 {
@@ -2518,14 +2484,6 @@
resets = <&cpg 501>;
#dma-cells = <1>;
dma-channels = <16>;
- iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>,
- <&ipmmu_mp 18>, <&ipmmu_mp 19>,
- <&ipmmu_mp 20>, <&ipmmu_mp 21>,
- <&ipmmu_mp 22>, <&ipmmu_mp 23>,
- <&ipmmu_mp 24>, <&ipmmu_mp 25>,
- <&ipmmu_mp 26>, <&ipmmu_mp 27>,
- <&ipmmu_mp 28>, <&ipmmu_mp 29>,
- <&ipmmu_mp 30>, <&ipmmu_mp 31>;
};
adsp: adsp@ec800000 {
@@ -2690,6 +2648,7 @@
max-frequency = <200000000>;
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
resets = <&cpg 314>;
+ iommus = <&ipmmu_ds1 32>;
status = "disabled";
};
@@ -2702,6 +2661,7 @@
max-frequency = <200000000>;
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
resets = <&cpg 313>;
+ iommus = <&ipmmu_ds1 33>;
status = "disabled";
};
@@ -2714,6 +2674,7 @@
max-frequency = <200000000>;
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
resets = <&cpg 312>;
+ iommus = <&ipmmu_ds1 34>;
status = "disabled";
};
@@ -2726,6 +2687,7 @@
max-frequency = <200000000>;
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
resets = <&cpg 311>;
+ iommus = <&ipmmu_ds1 35>;
status = "disabled";
};
@@ -2830,20 +2792,11 @@
resets = <&cpg 822>;
};
- fcpci0: vcp4@fe8df000 {
- compatible = "renesas,vcp4-fcpci0";
- reg = <0 0xfe8df000 0 0x200>;
- clocks = <&cpg CPG_MOD 617>;
- power-domains = <&sysc R8A7796_PD_A3VC>;
- resets = <&cpg 617>;
- renesas,#ch = <1>;
- };
-
fcpcs: vcp4@fe90f000 {
compatible = "renesas,vcp4-fcpcs";
reg = <0 0xfe90f000 0 0x200>;
clocks = <&cpg CPG_MOD 619>;
- power-domains = <&sysc R8A7796_PD_A3VC>;
+ power-domains = <&sysc R8A7796_PD_A2VC1>;
resets = <&cpg 619>;
renesas,#ch = <0>;
};
@@ -2854,9 +2807,9 @@
interrupts = <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 128>;
- power-domains = <&sysc R8A7796_PD_A2VC0>;
- resets = <&cpg 128>;
+ clocks = <&cpg CPG_MOD 130>;
+ power-domains = <&sysc R8A7796_PD_A2VC1>;
+ resets = <&cpg 130>;
renesas,#ch = <2>;
renesas,#fcp_ch = <1>;
};
@@ -2879,7 +2832,7 @@
interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 131>;
- power-domains = <&sysc R8A7796_PD_A2VC0>;
+ power-domains = <&sysc R8A7796_PD_A2VC1>;
resets = <&cpg 131>;
renesas,#ch = <1>;
renesas,#fcp_ch = <0>;
diff --git a/arch/arm64/boot/dts/renesas/r8a77965-m3nulcb.dts b/arch/arm64/boot/dts/renesas/r8a77965-m3nulcb.dts
new file mode 100644
index 00000000000000..0d3a6e65a77e4a
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a77965-m3nulcb.dts
@@ -0,0 +1,88 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the M3NULCB (R-Car Starter Kit Pro) board
+ *
+ * Copyright (C) 2019 Renesas Electronics Corp.
+ * Copyright (C) 2019 Cogent Embedded, Inc.
+ */
+
+/dts-v1/;
+#include "r8a77965.dtsi"
+#include "ulcb.dtsi"
+
+/ {
+ model = "Renesas M3NULCB board based on r8a77965";
+ compatible = "renesas,m3nulcb", "renesas,r8a77965";
+
+ memory@48000000 {
+ device_type = "memory";
+ /* first 128MB is reserved for secure area. */
+ reg = <0x0 0x48000000 0x0 0x78000000>;
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ /* device specific region for Lossy Decompression */
+ lossy_decompress: linux,lossy_decompress@54000000 {
+ no-map;
+ reg = <0x00000000 0x54000000 0x0 0x03000000>;
+ };
+
+ /* global autoconfigured region for contiguous allocations */
+ linux,cma@57000000 {
+ compatible = "shared-dma-pool";
+ reusable;
+ reg = <0x00000000 0x57000000 0x0 0x19000000>;
+ linux,cma-default;
+ };
+
+ /* device specific region for contiguous allocations */
+ mmp_reserved: linux,multimedia@70000000 {
+ compatible = "shared-dma-pool";
+ reusable;
+ reg = <0x00000000 0x70000000 0x0 0x10000000>;
+ };
+ };
+
+ mmngr {
+ compatible = "renesas,mmngr";
+ memory-region = <&mmp_reserved>, <&lossy_decompress>;
+ };
+
+ mmngrbuf {
+ compatible = "renesas,mmngrbuf";
+ };
+
+ vspm_if {
+ compatible = "renesas,vspm_if";
+ };
+
+ versaclock5_out3: versaclk-3 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* Initial value of versaclock out3 */
+ clock-frequency = <33000000>;
+ };
+};
+
+&du {
+ clocks = <&cpg CPG_MOD 724>,
+ <&cpg CPG_MOD 723>,
+ <&cpg CPG_MOD 721>,
+ <&versaclock5 1>,
+ <&versaclock5_out3>,
+ <&versaclock5 2>;
+ clock-names = "du.0", "du.1", "du.3",
+ "dclkin.0", "dclkin.1", "dclkin.3";
+};
+
+&vspb {
+ status = "okay";
+};
+
+&vspi0 {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index 454a67b132f478..c528a56605ba1d 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -750,14 +750,6 @@
resets = <&cpg 219>;
#dma-cells = <1>;
dma-channels = <16>;
- iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
- <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
- <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
- <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
- <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
- <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
- <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
- <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
};
dmac1: dma-controller@e7300000 {
@@ -792,14 +784,6 @@
resets = <&cpg 218>;
#dma-cells = <1>;
dma-channels = <16>;
- iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
- <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
- <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
- <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
- <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
- <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
- <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
- <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
};
dmac2: dma-controller@e7310000 {
@@ -834,14 +818,6 @@
resets = <&cpg 217>;
#dma-cells = <1>;
dma-channels = <16>;
- iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
- <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
- <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
- <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
- <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
- <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
- <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
- <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
};
ipmmu_mm: mmu@e67b0000 {
@@ -851,7 +827,6 @@
<GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_ds0: mmu@e6740000 {
@@ -869,7 +844,6 @@
renesas,ipmmu-main = <&ipmmu_mm 1>;
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_hc: mmu@e6570000 {
@@ -1759,14 +1733,6 @@
resets = <&cpg 502>;
#dma-cells = <1>;
dma-channels = <16>;
- iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
- <&ipmmu_mp 2>, <&ipmmu_mp 3>,
- <&ipmmu_mp 4>, <&ipmmu_mp 5>,
- <&ipmmu_mp 6>, <&ipmmu_mp 7>,
- <&ipmmu_mp 8>, <&ipmmu_mp 9>,
- <&ipmmu_mp 10>, <&ipmmu_mp 11>,
- <&ipmmu_mp 12>, <&ipmmu_mp 13>,
- <&ipmmu_mp 14>, <&ipmmu_mp 15>;
};
audma1: dma-controller@ec720000 {
@@ -1801,14 +1767,6 @@
resets = <&cpg 501>;
#dma-cells = <1>;
dma-channels = <16>;
- iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>,
- <&ipmmu_mp 18>, <&ipmmu_mp 19>,
- <&ipmmu_mp 20>, <&ipmmu_mp 21>,
- <&ipmmu_mp 22>, <&ipmmu_mp 23>,
- <&ipmmu_mp 24>, <&ipmmu_mp 25>,
- <&ipmmu_mp 26>, <&ipmmu_mp 27>,
- <&ipmmu_mp 28>, <&ipmmu_mp 29>,
- <&ipmmu_mp 30>, <&ipmmu_mp 31>;
};
adsp: adsp@ec800000 {
@@ -1974,6 +1932,7 @@
max-frequency = <200000000>;
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 314>;
+ iommus = <&ipmmu_ds1 32>;
status = "disabled";
};
@@ -1986,6 +1945,7 @@
max-frequency = <200000000>;
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 313>;
+ iommus = <&ipmmu_ds1 33>;
status = "disabled";
};
@@ -1998,6 +1958,7 @@
max-frequency = <200000000>;
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 312>;
+ iommus = <&ipmmu_ds1 34>;
status = "disabled";
};
@@ -2010,6 +1971,7 @@
max-frequency = <200000000>;
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 311>;
+ iommus = <&ipmmu_ds1 35>;
status = "disabled";
};
@@ -2106,7 +2068,7 @@
compatible = "renesas,vcp4-fcpcs";
reg = <0 0xfe90f000 0 0x200>;
clocks = <&cpg CPG_MOD 619>;
- power-domains = <&sysc R8A77965_PD_A3VC>;
+ power-domains = <&sysc R8A77965_PD_A2VC1>;
resets = <&cpg 619>;
renesas,#ch = <0>;
};
diff --git a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
index 26081a6e1866d9..2a751ccfc504ed 100644
--- a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
@@ -797,6 +797,8 @@
mmc-hs200-1_8v;
mmc-hs400-1_8v;
bus-width = <8>;
+ no-sd;
+ no-sdio;
non-removable;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/renesas/r8a77990-es10-ebisu.dts b/arch/arm64/boot/dts/renesas/r8a77990-es10-ebisu.dts
index 087d5533f3dbcd..b85df488180af1 100644
--- a/arch/arm64/boot/dts/renesas/r8a77990-es10-ebisu.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77990-es10-ebisu.dts
@@ -797,6 +797,8 @@
mmc-hs200-1_8v;
mmc-hs400-1_8v;
bus-width = <8>;
+ no-sd;
+ no-sdio;
non-removable;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
index bd4d71e2b93ef8..e5e3386b7e6e7d 100644
--- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
@@ -2,7 +2,7 @@
/*
* Device Tree Source for the R-Car E3 (R8A77990) SoC
*
- * Copyright (C) 2018 Renesas Electronics Corp.
+ * Copyright (C) 2018-2019 Renesas Electronics Corp.
*/
#include <dt-bindings/clock/r8a77990-cpg-mssr.h>
@@ -688,14 +688,6 @@
resets = <&cpg 219>;
#dma-cells = <1>;
dma-channels = <16>;
- iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
- <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
- <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
- <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
- <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
- <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
- <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
- <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
};
dmac1: dma-controller@e7300000 {
@@ -730,14 +722,6 @@
resets = <&cpg 218>;
#dma-cells = <1>;
dma-channels = <16>;
- iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
- <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
- <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
- <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
- <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
- <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
- <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
- <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
};
dmac2: dma-controller@e7310000 {
@@ -772,14 +756,6 @@
resets = <&cpg 217>;
#dma-cells = <1>;
dma-channels = <16>;
- iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
- <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
- <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
- <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
- <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
- <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
- <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
- <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
};
ipmmu_mm: mmu@e67b0000 {
@@ -789,7 +765,6 @@
<GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_ds0: mmu@e6740000 {
@@ -807,7 +782,6 @@
renesas,ipmmu-main = <&ipmmu_mm 1>;
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_hc: mmu@e6570000 {
@@ -1083,9 +1057,8 @@
<&cpg CPG_CORE R8A77990_CLK_S3D1C>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
- <&dmac2 0x5b>, <&dmac2 0x5a>;
- dma-names = "tx", "rx", "tx", "rx";
+ dmas = <&dmac0 0x5b>, <&dmac0 0x5a>;
+ dma-names = "tx", "rx";
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
resets = <&cpg 202>;
status = "disabled";
@@ -1459,14 +1432,6 @@
resets = <&cpg 502>;
#dma-cells = <1>;
dma-channels = <16>;
- iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
- <&ipmmu_mp 2>, <&ipmmu_mp 3>,
- <&ipmmu_mp 4>, <&ipmmu_mp 5>,
- <&ipmmu_mp 6>, <&ipmmu_mp 7>,
- <&ipmmu_mp 8>, <&ipmmu_mp 9>,
- <&ipmmu_mp 10>, <&ipmmu_mp 11>,
- <&ipmmu_mp 12>, <&ipmmu_mp 13>,
- <&ipmmu_mp 14>, <&ipmmu_mp 15>;
};
adsp: adsp@ec800000 {
@@ -1594,6 +1559,7 @@
max-frequency = <200000000>;
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
resets = <&cpg 314>;
+ iommus = <&ipmmu_ds1 32>;
status = "disabled";
};
@@ -1606,6 +1572,7 @@
max-frequency = <200000000>;
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
resets = <&cpg 313>;
+ iommus = <&ipmmu_ds1 33>;
status = "disabled";
};
@@ -1618,6 +1585,7 @@
max-frequency = <200000000>;
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
resets = <&cpg 311>;
+ iommus = <&ipmmu_ds1 35>;
status = "disabled";
};
diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
index 922b9cc4797c70..45489ec9a1c245 100644
--- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
@@ -833,6 +833,8 @@
bus-width = <8>;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
+ no-sd;
+ no-sdio;
non-removable;
fixed-emmc-driver-type = <1>;
status = "okay";