more patches removed that made it into 2.6.17-rc1-git12

9 files changed, 0 insertions, 1233 deletions

diff --git a/pci/dma-doc-updates.patch b/pci/dma-doc-updates.patch
deleted file mode 100644
index 933c49ca35e38..0000000000000
--- a/pci/dma-doc-updates.patch
+++ /dev/null
@@ -1,152 +0,0 @@
-From david-b@pacbell.net Sat Apr  1 10:43:27 2006
-From: David Brownell <david-b@pacbell.net>
-To: Linux Kernel list <linux-kernel@vger.kernel.org>
-Subject: dma doc updates
-Date: Sat, 1 Apr 2006 10:21:52 -0800
-Cc: Greg KH <greg@kroah.com>
-Message-Id: <200604011021.53162.david-b@pacbell.net>
-
-This updates the DMA API documentation to address a few issues:
-
- - The dma_map_sg() call results are used like pci_map_sg() results:
-   using sg_dma_address() and sg_dma_len().  That's not wholly obvious
-   to folk reading _only_ the "new" DMA-API.txt writeup.
-
- - Buffers allocated by dma_alloc_coherent() may not be completely
-   free of coherency concerns ... some CPUs also have write buffers
-   that may need to be flushed.
-
- - Cacheline coherence issues are now mentioned as being among issues
-   which affect dma buffers, and complicate/prevent using of static and
-   (especially) stack based buffers with the DMA calls.
-
-I don't think many drivers currently need to worry about flushing write
-buffers, but I did hit it with one SOC using external SDRAM for DMA
-descriptors:  without explicit writebuffer flushing, the on-chip DMA
-controller accessed descriptors before the CPU completed the writes.
-
-Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
-Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-
----
- Documentation/DMA-API.txt     |   49 ++++++++++++++++++++++++++++++------------
- Documentation/DMA-mapping.txt |   22 ++++++++++++++----
- 2 files changed, 53 insertions(+), 18 deletions(-)
-
---- gregkh-2.6.orig/Documentation/DMA-API.txt
-+++ gregkh-2.6/Documentation/DMA-API.txt
-@@ -33,7 +33,9 @@ pci_alloc_consistent(struct pci_dev *dev
- 
- Consistent memory is memory for which a write by either the device or
- the processor can immediately be read by the processor or device
--without having to worry about caching effects.
-+without having to worry about caching effects.  (You may however need
-+to make sure to flush the processor's write buffers before telling
-+devices to read that memory.)
- 
- This routine allocates a region of <size> bytes of consistent memory.
- it also returns a <dma_handle> which may be cast to an unsigned
-@@ -304,12 +306,12 @@ dma address with dma_mapping_error(). A 
- could not be created and the driver should take appropriate action (eg
- reduce current DMA mapping usage or delay and try again later).
- 
--int
--dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
--	   enum dma_data_direction direction)
--int
--pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg,
--	   int nents, int direction)
-+	int
-+	dma_map_sg(struct device *dev, struct scatterlist *sg,
-+		int nents, enum dma_data_direction direction)
-+	int
-+	pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg,
-+		int nents, int direction)
- 
- Maps a scatter gather list from the block layer.
- 
-@@ -327,12 +329,33 @@ critical that the driver do something, i
- aborting the request or even oopsing is better than doing nothing and
- corrupting the filesystem.
- 
--void
--dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
--	     enum dma_data_direction direction)
--void
--pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg,
--	     int nents, int direction)
-+With scatterlists, you use the resulting mapping like this:
-+
-+	int i, count = dma_map_sg(dev, sglist, nents, direction);
-+	struct scatterlist *sg;
-+
-+	for (i = 0, sg = sglist; i < count; i++, sg++) {
-+		hw_address[i] = sg_dma_address(sg);
-+		hw_len[i] = sg_dma_len(sg);
-+	}
-+
-+where nents is the number of entries in the sglist.
-+
-+The implementation is free to merge several consecutive sglist entries
-+into one (e.g. with an IOMMU, or if several pages just happen to be
-+physically contiguous) and returns the actual number of sg entries it
-+mapped them to. On failure 0, is returned.
-+
-+Then you should loop count times (note: this can be less than nents times)
-+and use sg_dma_address() and sg_dma_len() macros where you previously
-+accessed sg->address and sg->length as shown above.
-+
-+	void
-+	dma_unmap_sg(struct device *dev, struct scatterlist *sg,
-+		int nhwentries, enum dma_data_direction direction)
-+	void
-+	pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg,
-+		int nents, int direction)
- 
- unmap the previously mapped scatter/gather list.  All the parameters
- must be the same as those and passed in to the scatter/gather mapping
---- gregkh-2.6.orig/Documentation/DMA-mapping.txt
-+++ gregkh-2.6/Documentation/DMA-mapping.txt
-@@ -58,11 +58,15 @@ translating each of those pages back to 
- something like __va().  [ EDIT: Update this when we integrate
- Gerd Knorr's generic code which does this. ]
- 
--This rule also means that you may not use kernel image addresses
--(ie. items in the kernel's data/text/bss segment, or your driver's)
--nor may you use kernel stack addresses for DMA.  Both of these items
--might be mapped somewhere entirely different than the rest of physical
--memory.
-+This rule also means that you may use neither kernel image addresses
-+(items in data/text/bss segments), nor module image addresses, nor
-+stack addresses for DMA.  These could all be mapped somewhere entirely
-+different than the rest of physical memory.  Even if those classes of
-+memory could physically work with DMA, you'd need to ensure the I/O
-+buffers were cacheline-aligned.  Without that, you'd see cacheline
-+sharing problems (data corruption) on CPUs with DMA-incoherent caches.
-+(The CPU could write to one word, DMA would write to a different one
-+in the same cache line, and one of them could be overwritten.)
- 
- Also, this means that you cannot take the return of a kmap()
- call and DMA to/from that.  This is similar to vmalloc().
-@@ -284,6 +288,11 @@ There are two types of DMA mappings:
- 
-              in order to get correct behavior on all platforms.
- 
-+	     Also, on some platforms your driver may need to flush CPU write
-+	     buffers in much the same way as it needs to flush write buffers
-+	     found in PCI bridges (such as by reading a register's value
-+	     after writing it).
-+
- - Streaming DMA mappings which are usually mapped for one DMA transfer,
-   unmapped right after it (unless you use pci_dma_sync_* below) and for which
-   hardware can optimize for sequential accesses.
-@@ -303,6 +312,9 @@ There are two types of DMA mappings:
- 
- Neither type of DMA mapping has alignment restrictions that come
- from PCI, although some devices may have such restrictions.
-+Also, systems with caches that aren't DMA-coherent will work better
-+when the underlying buffers don't share cache lines with other data.
-+
- 
- 		 Using Consistent DMA mappings.
- 
diff --git a/pci/msi-save-restore-for-suspend-resume.patch b/pci/msi-save-restore-for-suspend-resume.patch
deleted file mode 100644
index c209ebf4371a9..0000000000000
--- a/pci/msi-save-restore-for-suspend-resume.patch
+++ /dev/null
@@ -1,372 +0,0 @@
-From owner-linux-pci@atrey.karlin.mff.cuni.cz Wed Feb  8 01:12:18 2006
-Subject: PCI: MSI(X) save/restore for suspend/resume
-From: Shaohua Li <shaohua.li@intel.com>
-Cc: Andrew Morton <akpm@osdl.org>, Greg <greg@kroah.com>
-Date: Wed, 08 Feb 2006 17:11:38 +0800
-Message-Id: <1139389898.14976.11.camel@sli10-desk.sh.intel.com>
-
-Add MSI(X) configure sapce save/restore in generic PCI helper.
-
-Signed-off-by: Shaohua Li <shaohua.li@intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-
----
- drivers/pci/msi.c   |  227 +++++++++++++++++++++++++++++++++++++++++++++-------
- drivers/pci/pci.c   |    6 +
- drivers/pci/pci.h   |   11 ++
- include/linux/pci.h |   31 +++++++
- 4 files changed, 246 insertions(+), 29 deletions(-)
-
---- gregkh-2.6.orig/drivers/pci/msi.c
-+++ gregkh-2.6/drivers/pci/msi.c
-@@ -504,6 +504,201 @@ void pci_scan_msi_device(struct pci_dev 
- 		nr_reserved_vectors++;
- }
- 
-+#ifdef CONFIG_PM
-+int pci_save_msi_state(struct pci_dev *dev)
-+{
-+	int pos, i = 0;
-+	u16 control;
-+	struct pci_cap_saved_state *save_state;
-+	u32 *cap;
-+
-+	pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
-+	if (pos <= 0 || dev->no_msi)
-+		return 0;
-+
-+	pci_read_config_word(dev, msi_control_reg(pos), &control);
-+	if (!(control & PCI_MSI_FLAGS_ENABLE))
-+		return 0;
-+
-+	save_state = kzalloc(sizeof(struct pci_cap_saved_state) + sizeof(u32) * 5,
-+		GFP_KERNEL);
-+	if (!save_state) {
-+		printk(KERN_ERR "Out of memory in pci_save_msi_state\n");
-+		return -ENOMEM;
-+	}
-+	cap = &save_state->data[0];
-+
-+	pci_read_config_dword(dev, pos, &cap[i++]);
-+	control = cap[0] >> 16;
-+	pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_LO, &cap[i++]);
-+	if (control & PCI_MSI_FLAGS_64BIT) {
-+		pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_HI, &cap[i++]);
-+		pci_read_config_dword(dev, pos + PCI_MSI_DATA_64, &cap[i++]);
-+	} else
-+		pci_read_config_dword(dev, pos + PCI_MSI_DATA_32, &cap[i++]);
-+	if (control & PCI_MSI_FLAGS_MASKBIT)
-+		pci_read_config_dword(dev, pos + PCI_MSI_MASK_BIT, &cap[i++]);
-+	disable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
-+	save_state->cap_nr = PCI_CAP_ID_MSI;
-+	pci_add_saved_cap(dev, save_state);
-+	return 0;
-+}
-+
-+void pci_restore_msi_state(struct pci_dev *dev)
-+{
-+	int i = 0, pos;
-+	u16 control;
-+	struct pci_cap_saved_state *save_state;
-+	u32 *cap;
-+
-+	save_state = pci_find_saved_cap(dev, PCI_CAP_ID_MSI);
-+	pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
-+	if (!save_state || pos <= 0)
-+		return;
-+	cap = &save_state->data[0];
-+
-+	control = cap[i++] >> 16;
-+	pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_LO, cap[i++]);
-+	if (control & PCI_MSI_FLAGS_64BIT) {
-+		pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_HI, cap[i++]);
-+		pci_write_config_dword(dev, pos + PCI_MSI_DATA_64, cap[i++]);
-+	} else
-+		pci_write_config_dword(dev, pos + PCI_MSI_DATA_32, cap[i++]);
-+	if (control & PCI_MSI_FLAGS_MASKBIT)
-+		pci_write_config_dword(dev, pos + PCI_MSI_MASK_BIT, cap[i++]);
-+	pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control);
-+	enable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
-+	pci_remove_saved_cap(save_state);
-+	kfree(save_state);
-+}
-+
-+int pci_save_msix_state(struct pci_dev *dev)
-+{
-+	int pos;
-+	u16 control;
-+	struct pci_cap_saved_state *save_state;
-+
-+	pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
-+	if (pos <= 0 || dev->no_msi)
-+		return 0;
-+
-+	pci_read_config_word(dev, msi_control_reg(pos), &control);
-+	if (!(control & PCI_MSIX_FLAGS_ENABLE))
-+		return 0;
-+	save_state = kzalloc(sizeof(struct pci_cap_saved_state) + sizeof(u16),
-+		GFP_KERNEL);
-+	if (!save_state) {
-+		printk(KERN_ERR "Out of memory in pci_save_msix_state\n");
-+		return -ENOMEM;
-+	}
-+	*((u16 *)&save_state->data[0]) = control;
-+
-+	disable_msi_mode(dev, pos, PCI_CAP_ID_MSIX);
-+	save_state->cap_nr = PCI_CAP_ID_MSIX;
-+	pci_add_saved_cap(dev, save_state);
-+	return 0;
-+}
-+
-+void pci_restore_msix_state(struct pci_dev *dev)
-+{
-+	u16 save;
-+	int pos;
-+	int vector, head, tail = 0;
-+	void __iomem *base;
-+	int j;
-+	struct msg_address address;
-+	struct msg_data data;
-+	struct msi_desc *entry;
-+	int temp;
-+	struct pci_cap_saved_state *save_state;
-+
-+	save_state = pci_find_saved_cap(dev, PCI_CAP_ID_MSIX);
-+	if (!save_state)
-+		return;
-+	save = *((u16 *)&save_state->data[0]);
-+	pci_remove_saved_cap(save_state);
-+	kfree(save_state);
-+
-+	pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
-+	if (pos <= 0)
-+		return;
-+
-+	/* route the table */
-+	temp = dev->irq;
-+	if (msi_lookup_vector(dev, PCI_CAP_ID_MSIX))
-+		return;
-+	vector = head = dev->irq;
-+	while (head != tail) {
-+		entry = msi_desc[vector];
-+		base = entry->mask_base;
-+		j = entry->msi_attrib.entry_nr;
-+
-+		msi_address_init(&address);
-+		msi_data_init(&data, vector);
-+
-+		address.lo_address.value &= MSI_ADDRESS_DEST_ID_MASK;
-+		address.lo_address.value |= entry->msi_attrib.current_cpu <<
-+					MSI_TARGET_CPU_SHIFT;
-+
-+		writel(address.lo_address.value,
-+			base + j * PCI_MSIX_ENTRY_SIZE +
-+			PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
-+		writel(address.hi_address,
-+			base + j * PCI_MSIX_ENTRY_SIZE +
-+			PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
-+		writel(*(u32*)&data,
-+			base + j * PCI_MSIX_ENTRY_SIZE +
-+			PCI_MSIX_ENTRY_DATA_OFFSET);
-+
-+		tail = msi_desc[vector]->link.tail;
-+		vector = tail;
-+	}
-+	dev->irq = temp;
-+
-+	pci_write_config_word(dev, msi_control_reg(pos), save);
-+	enable_msi_mode(dev, pos, PCI_CAP_ID_MSIX);
-+}
-+#endif
-+
-+static void msi_register_init(struct pci_dev *dev, struct msi_desc *entry)
-+{
-+	struct msg_address address;
-+	struct msg_data data;
-+	int pos, vector = dev->irq;
-+	u16 control;
-+
-+   	pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
-+	pci_read_config_word(dev, msi_control_reg(pos), &control);
-+	/* Configure MSI capability structure */
-+	msi_address_init(&address);
-+	msi_data_init(&data, vector);
-+	entry->msi_attrib.current_cpu = ((address.lo_address.u.dest_id >>
-+				MSI_TARGET_CPU_SHIFT) & MSI_TARGET_CPU_MASK);
-+	pci_write_config_dword(dev, msi_lower_address_reg(pos),
-+			address.lo_address.value);
-+	if (is_64bit_address(control)) {
-+		pci_write_config_dword(dev,
-+			msi_upper_address_reg(pos), address.hi_address);
-+		pci_write_config_word(dev,
-+			msi_data_reg(pos, 1), *((u32*)&data));
-+	} else
-+		pci_write_config_word(dev,
-+			msi_data_reg(pos, 0), *((u32*)&data));
-+	if (entry->msi_attrib.maskbit) {
-+		unsigned int maskbits, temp;
-+		/* All MSIs are unmasked by default, Mask them all */
-+		pci_read_config_dword(dev,
-+			msi_mask_bits_reg(pos, is_64bit_address(control)),
-+			&maskbits);
-+		temp = (1 << multi_msi_capable(control));
-+		temp = ((temp - 1) & ~temp);
-+		maskbits |= temp;
-+		pci_write_config_dword(dev,
-+			msi_mask_bits_reg(pos, is_64bit_address(control)),
-+			maskbits);
-+	}
-+}
-+
- /**
-  * msi_capability_init - configure device's MSI capability structure
-  * @dev: pointer to the pci_dev data structure of MSI device function
-@@ -516,8 +711,6 @@ void pci_scan_msi_device(struct pci_dev 
- static int msi_capability_init(struct pci_dev *dev)
- {
- 	struct msi_desc *entry;
--	struct msg_address address;
--	struct msg_data data;
- 	int pos, vector;
- 	u16 control;
- 
-@@ -549,33 +742,8 @@ static int msi_capability_init(struct pc
- 	/* Replace with MSI handler */
- 	irq_handler_init(PCI_CAP_ID_MSI, vector, entry->msi_attrib.maskbit);
- 	/* Configure MSI capability structure */
--	msi_address_init(&address);
--	msi_data_init(&data, vector);
--	entry->msi_attrib.current_cpu = ((address.lo_address.u.dest_id >>
--				MSI_TARGET_CPU_SHIFT) & MSI_TARGET_CPU_MASK);
--	pci_write_config_dword(dev, msi_lower_address_reg(pos),
--			address.lo_address.value);
--	if (is_64bit_address(control)) {
--		pci_write_config_dword(dev,
--			msi_upper_address_reg(pos), address.hi_address);
--		pci_write_config_word(dev,
--			msi_data_reg(pos, 1), *((u32*)&data));
--	} else
--		pci_write_config_word(dev,
--			msi_data_reg(pos, 0), *((u32*)&data));
--	if (entry->msi_attrib.maskbit) {
--		unsigned int maskbits, temp;
--		/* All MSIs are unmasked by default, Mask them all */
--		pci_read_config_dword(dev,
--			msi_mask_bits_reg(pos, is_64bit_address(control)),
--			&maskbits);
--		temp = (1 << multi_msi_capable(control));
--		temp = ((temp - 1) & ~temp);
--		maskbits |= temp;
--		pci_write_config_dword(dev,
--			msi_mask_bits_reg(pos, is_64bit_address(control)),
--			maskbits);
--	}
-+	msi_register_init(dev, entry);
-+
- 	attach_msi_entry(entry, vector);
- 	/* Set MSI enabled bits	 */
- 	enable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
-@@ -731,6 +899,7 @@ int pci_enable_msi(struct pci_dev* dev)
- 			vector_irq[dev->irq] = -1;
- 			nr_released_vectors--;
- 			spin_unlock_irqrestore(&msi_lock, flags);
-+			msi_register_init(dev, msi_desc[dev->irq]);
- 			enable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
- 			return 0;
- 		}
---- gregkh-2.6.orig/drivers/pci/pci.c
-+++ gregkh-2.6/drivers/pci/pci.c
-@@ -446,6 +446,10 @@ pci_save_state(struct pci_dev *dev)
- 	/* XXX: 100% dword access ok here? */
- 	for (i = 0; i < 16; i++)
- 		pci_read_config_dword(dev, i * 4,&dev->saved_config_space[i]);
-+	if ((i = pci_save_msi_state(dev)) != 0)
-+		return i;
-+	if ((i = pci_save_msix_state(dev)) != 0)
-+		return i;
- 	return 0;
- }
- 
-@@ -460,6 +464,8 @@ pci_restore_state(struct pci_dev *dev)
- 
- 	for (i = 0; i < 16; i++)
- 		pci_write_config_dword(dev,i * 4, dev->saved_config_space[i]);
-+	pci_restore_msi_state(dev);
-+	pci_restore_msix_state(dev);
- 	return 0;
- }
- 
---- gregkh-2.6.orig/drivers/pci/pci.h
-+++ gregkh-2.6/drivers/pci/pci.h
-@@ -55,6 +55,17 @@ void pci_no_msi(void);
- static inline void disable_msi_mode(struct pci_dev *dev, int pos, int type) { }
- static inline void pci_no_msi(void) { }
- #endif
-+#if defined(CONFIG_PCI_MSI) && defined(CONFIG_PM)
-+int pci_save_msi_state(struct pci_dev *dev);
-+int pci_save_msix_state(struct pci_dev *dev);
-+void pci_restore_msi_state(struct pci_dev *dev);
-+void pci_restore_msix_state(struct pci_dev *dev);
-+#else
-+static inline int pci_save_msi_state(struct pci_dev *dev) { return 0; }
-+static inline int pci_save_msix_state(struct pci_dev *dev) { return 0; }
-+static inline void pci_restore_msi_state(struct pci_dev *dev) {}
-+static inline void pci_restore_msix_state(struct pci_dev *dev) {}
-+#endif
- 
- extern int pcie_mch_quirk;
- extern struct device_attribute pci_dev_attrs[];
---- gregkh-2.6.orig/include/linux/pci.h
-+++ gregkh-2.6/include/linux/pci.h
-@@ -100,6 +100,12 @@ enum pci_bus_flags {
- 	PCI_BUS_FLAGS_NO_MSI = (pci_bus_flags_t) 1,
- };
- 
-+struct pci_cap_saved_state {
-+	struct hlist_node next;
-+	char cap_nr;
-+	u32 data[0];
-+};
-+
- /*
-  * The pci_dev structure is used to describe PCI devices.
-  */
-@@ -159,6 +165,7 @@ struct pci_dev {
- 	unsigned int	block_ucfg_access:1;	/* userspace config space access is blocked */
- 
- 	u32		saved_config_space[16]; /* config space saved at suspend time */
-+	struct hlist_head saved_cap_space;
- 	struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
- 	int rom_attr_enabled;		/* has display of the rom attribute been enabled? */
- 	struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
-@@ -169,6 +176,30 @@ struct pci_dev {
- #define	to_pci_dev(n) container_of(n, struct pci_dev, dev)
- #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
- 
-+static inline struct pci_cap_saved_state *pci_find_saved_cap(
-+	struct pci_dev *pci_dev,char cap)
-+{
-+	struct pci_cap_saved_state *tmp;
-+	struct hlist_node *pos;
-+
-+	hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
-+		if (tmp->cap_nr == cap)
-+			return tmp;
-+	}
-+	return NULL;
-+}
-+
-+static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
-+	struct pci_cap_saved_state *new_cap)
-+{
-+	hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
-+}
-+
-+static inline void pci_remove_saved_cap(struct pci_cap_saved_state *cap)
-+{
-+	hlist_del(&cap->next);
-+}
-+
- /*
-  *  For PCI devices, the region numbers are assigned this way:
-  *
diff --git a/pci/pci-add-pci-quirk-for-smbus-on-the-asus-a6va-notebook.patch b/pci/pci-add-pci-quirk-for-smbus-on-the-asus-a6va-notebook.patch
deleted file mode 100644
index c726b6ad09348..0000000000000
--- a/pci/pci-add-pci-quirk-for-smbus-on-the-asus-a6va-notebook.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From khali@linux-fr.org Sat Apr  1 06:46:37 2006
-Date: Sat, 1 Apr 2006 16:46:35 +0200
-From: Jean Delvare <khali@linux-fr.org>
-To: Greg KH <gregkh@suse.de>
-Subject: [PATCH] PCI: Add PCI quirk for SMBus on the Asus A6VA notebook
-Message-Id: <20060401164635.3a69bc24.khali@linux-fr.org>
-
-The Asus A6VA notebook was reported to need a PCI quirk to unhide
-the SMBus.
-
-Signed-off-by: Jean Delvare <khali@linux-fr.org>
-Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-
----
- drivers/pci/quirks.c |    2 ++
- 1 file changed, 2 insertions(+)
-
---- gregkh-2.6.orig/drivers/pci/quirks.c
-+++ gregkh-2.6/drivers/pci/quirks.c
-@@ -921,6 +921,7 @@ static void __init asus_hides_smbus_host
- 		if (dev->device == PCI_DEVICE_ID_INTEL_82915GM_HB) {
- 			switch (dev->subsystem_device) {
- 			case 0x1882: /* M6V notebook */
-+			case 0x1977: /* A6VA notebook */
- 				asus_hides_smbus = 1;
- 			}
- 		}
-@@ -999,6 +1000,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
- DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL,	PCI_DEVICE_ID_INTEL_82801CA_12,	asus_hides_smbus_lpc );
- DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL,	PCI_DEVICE_ID_INTEL_82801DB_12,	asus_hides_smbus_lpc );
- DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL,	PCI_DEVICE_ID_INTEL_82801EB_0,	asus_hides_smbus_lpc );
-+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL,	PCI_DEVICE_ID_INTEL_ICH6_1,	asus_hides_smbus_lpc );
- 
- static void __init asus_hides_smbus_lpc_ich6(struct pci_dev *dev)
- {
diff --git a/pci/pci-fix-sparse-warning-about-pci_bus_flags.patch b/pci/pci-fix-sparse-warning-about-pci_bus_flags.patch
deleted file mode 100644
index 2ac90d6b16b6f..0000000000000
--- a/pci/pci-fix-sparse-warning-about-pci_bus_flags.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From rdreier@cisco.com Thu Mar 30 12:55:17 2006
-To: greg@kroah.com
-Cc: <mst@mellanox.co.il>
-Subject: PCI: fix sparse warning about pci_bus_flags
-From: Roland Dreier <rdreier@cisco.com>
-Date: Thu, 30 Mar 2006 12:55:10 -0800
-Message-ID: <adamzf71wlt.fsf@cisco.com>
-
-Sparse warns about casting to a __bitwise type.  However, it's correct
-to do when defining the enum for pci_bus_flags_t, so add a __force to
-quiet the warnings.  This will fix getting
-
-    include/linux/pci.h:100:26: warning: cast to restricted type
-
-from sparse all over the build.
-
-Signed-off-by: Roland Dreier <rolandd@cisco.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-
----
- include/linux/pci.h |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- gregkh-2.6.orig/include/linux/pci.h
-+++ gregkh-2.6/include/linux/pci.h
-@@ -97,7 +97,7 @@ enum pci_channel_state {
- 
- typedef unsigned short __bitwise pci_bus_flags_t;
- enum pci_bus_flags {
--	PCI_BUS_FLAGS_NO_MSI = (pci_bus_flags_t) 1,
-+	PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
- };
- 
- struct pci_cap_saved_state {
diff --git a/pci/pci-msi-save-restore-for-suspend-resume.patch b/pci/pci-msi-save-restore-for-suspend-resume.patch
deleted file mode 100644
index aec8d4575c324..0000000000000
--- a/pci/pci-msi-save-restore-for-suspend-resume.patch
+++ /dev/null
@@ -1,398 +0,0 @@
-From shaohua.li@intel.com Wed Feb 22 00:14:36 2006
-From: Shaohua Li <shaohua.li@intel.com>
-Subject: PCI: MSI(X) save/restore for suspend/resume
-To: Greg KH <greg@kroah.com>
-Cc: Andrew Morton <akpm@osdl.org>
-Date: Wed, 22 Feb 2006 16:13:55 +0800
-Message-Id: <1140596035.6056.16.camel@sli10-desk.sh.intel.com>
-
-Add MSI(X) configure space save/restore in generic PCI helper.
-
-Signed-off-by: Shaohua Li <shaohua.li@intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
----
- drivers/pci/msi.c   |  255 +++++++++++++++++++++++++++++++++++++++++++++-------
- drivers/pci/pci.c   |    9 +
- drivers/pci/pci.h   |   12 ++
- include/linux/pci.h |   31 ++++++
- 4 files changed, 277 insertions(+), 30 deletions(-)
-
---- gregkh-2.6.orig/drivers/pci/msi.c
-+++ gregkh-2.6/drivers/pci/msi.c
-@@ -504,6 +504,217 @@ void pci_scan_msi_device(struct pci_dev 
- 		nr_reserved_vectors++;
- }
- 
-+#ifdef CONFIG_PM
-+int pci_save_msi_state(struct pci_dev *dev)
-+{
-+	int pos, i = 0;
-+	u16 control;
-+	struct pci_cap_saved_state *save_state;
-+	u32 *cap;
-+
-+	if (!pci_msi_enable || dev->no_msi)
-+		return 0;
-+	pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
-+	if (pos)
-+		return 0;
-+
-+	pci_read_config_word(dev, msi_control_reg(pos), &control);
-+	if (!(control & PCI_MSI_FLAGS_ENABLE))
-+		return 0;
-+
-+	save_state = kzalloc(sizeof(struct pci_cap_saved_state) + sizeof(u32) * 5,
-+		GFP_KERNEL);
-+	if (!save_state) {
-+		printk(KERN_ERR "Out of memory in pci_save_msi_state\n");
-+		return -ENOMEM;
-+	}
-+	cap = &save_state->data[0];
-+
-+	pci_read_config_dword(dev, pos, &cap[i++]);
-+	control = cap[0] >> 16;
-+	pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_LO, &cap[i++]);
-+	if (control & PCI_MSI_FLAGS_64BIT) {
-+		pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_HI, &cap[i++]);
-+		pci_read_config_dword(dev, pos + PCI_MSI_DATA_64, &cap[i++]);
-+	} else
-+		pci_read_config_dword(dev, pos + PCI_MSI_DATA_32, &cap[i++]);
-+	if (control & PCI_MSI_FLAGS_MASKBIT)
-+		pci_read_config_dword(dev, pos + PCI_MSI_MASK_BIT, &cap[i++]);
-+	disable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
-+	save_state->cap_nr = PCI_CAP_ID_MSI;
-+	pci_add_saved_cap(dev, save_state);
-+	return 0;
-+}
-+
-+int pci_restore_msi_state(struct pci_dev *dev)
-+{
-+	int i = 0, pos;
-+	u16 control;
-+	struct pci_cap_saved_state *save_state;
-+	u32 *cap;
-+
-+	save_state = pci_find_saved_cap(dev, PCI_CAP_ID_MSI);
-+	pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
-+	if (!save_state || pos <= 0)
-+		return 0;
-+	cap = &save_state->data[0];
-+
-+	control = cap[i++] >> 16;
-+	pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_LO, cap[i++]);
-+	if (control & PCI_MSI_FLAGS_64BIT) {
-+		pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_HI, cap[i++]);
-+		pci_write_config_dword(dev, pos + PCI_MSI_DATA_64, cap[i++]);
-+	} else
-+		pci_write_config_dword(dev, pos + PCI_MSI_DATA_32, cap[i++]);
-+	if (control & PCI_MSI_FLAGS_MASKBIT)
-+		pci_write_config_dword(dev, pos + PCI_MSI_MASK_BIT, cap[i++]);
-+	pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control);
-+	enable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
-+	pci_remove_saved_cap(save_state);
-+	kfree(save_state);
-+	return 0;
-+}
-+
-+int pci_save_msix_state(struct pci_dev *dev)
-+{
-+	int pos;
-+	u16 control;
-+	struct pci_cap_saved_state *save_state;
-+
-+	if (!pci_msi_enable || dev->no_msi)
-+		return 0;
-+	pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
-+	if (pos <= 0)
-+		return 0;
-+
-+	pci_read_config_word(dev, msi_control_reg(pos), &control);
-+	if (!(control & PCI_MSIX_FLAGS_ENABLE))
-+		return 0;
-+	save_state = kzalloc(sizeof(struct pci_cap_saved_state) + sizeof(u16),
-+		GFP_KERNEL);
-+	if (!save_state) {
-+		printk(KERN_ERR "Out of memory in pci_save_msix_state\n");
-+		return -ENOMEM;
-+	}
-+	*((u16 *)&save_state->data[0]) = control;
-+
-+	disable_msi_mode(dev, pos, PCI_CAP_ID_MSIX);
-+	save_state->cap_nr = PCI_CAP_ID_MSIX;
-+	pci_add_saved_cap(dev, save_state);
-+	return 0;
-+}
-+
-+int pci_restore_msix_state(struct pci_dev *dev)
-+{
-+	u16 save;
-+	int pos;
-+	int vector, head, tail = 0;
-+	void __iomem *base;
-+	int j;
-+	u32 address_hi;
-+	u32 address_lo;
-+	u32 data;
-+	struct msi_desc *entry;
-+	int temp;
-+	struct pci_cap_saved_state *save_state;
-+	int status = 0;
-+
-+	save_state = pci_find_saved_cap(dev, PCI_CAP_ID_MSIX);
-+	if (!save_state)
-+		return 0;
-+	save = *((u16 *)&save_state->data[0]);
-+	pci_remove_saved_cap(save_state);
-+	kfree(save_state);
-+
-+	pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
-+	if (pos <= 0)
-+		return 0;
-+
-+	/* route the table */
-+	temp = dev->irq;
-+	if (msi_lookup_vector(dev, PCI_CAP_ID_MSIX))
-+		return -EINVAL;
-+	vector = head = dev->irq;
-+	while (head != tail) {
-+		entry = msi_desc[vector];
-+		base = entry->mask_base;
-+		j = entry->msi_attrib.entry_nr;
-+
-+		/* Configure MSI-X capability structure */
-+		status = msi_ops->setup(dev, vector,
-+					&address_hi,
-+					&address_lo,
-+					&data);
-+		if (status < 0)
-+			break;
-+
-+		writel(address_lo,
-+			base + j * PCI_MSIX_ENTRY_SIZE +
-+			PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
-+		writel(address_hi,
-+			base + j * PCI_MSIX_ENTRY_SIZE +
-+			PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
-+		writel(data,
-+			base + j * PCI_MSIX_ENTRY_SIZE +
-+			PCI_MSIX_ENTRY_DATA_OFFSET);
-+
-+		tail = msi_desc[vector]->link.tail;
-+		vector = tail;
-+	}
-+	dev->irq = temp;
-+
-+	if (status) {
-+		printk(KERN_ERR "PCI %s: restore MSI-X configs failed\n", pci_name(dev));
-+		return status;
-+	}
-+
-+	pci_write_config_word(dev, msi_control_reg(pos), save);
-+	enable_msi_mode(dev, pos, PCI_CAP_ID_MSIX);
-+	return 0;
-+}
-+#endif
-+
-+static int msi_register_init(struct pci_dev *dev, struct msi_desc *entry)
-+{
-+	u32 address_lo;
-+	u32 address_hi;
-+	u32 data;
-+	int pos, vector = dev->irq;
-+	u16 control;
-+	int status;
-+
-+	pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
-+	pci_read_config_word(dev, msi_control_reg(pos), &control);
-+
-+	status = msi_register_init(dev, entry);
-+	if (status < 0)
-+		return status;
-+
-+	pci_write_config_dword(dev, msi_lower_address_reg(pos), address_lo);
-+	if (is_64bit_address(control)) {
-+		pci_write_config_dword(dev,
-+			msi_upper_address_reg(pos), address_hi);
-+		pci_write_config_word(dev, msi_data_reg(pos, 1), data);
-+	} else
-+		pci_write_config_word(dev, msi_data_reg(pos, 0), data);
-+
-+	if (entry->msi_attrib.maskbit) {
-+		unsigned int maskbits, temp;
-+		/* All MSIs are unmasked by default, Mask them all */
-+		pci_read_config_dword(dev,
-+			msi_mask_bits_reg(pos, is_64bit_address(control)),
-+			&maskbits);
-+		temp = (1 << multi_msi_capable(control));
-+		temp = ((temp - 1) & ~temp);
-+		maskbits |= temp;
-+		pci_write_config_dword(dev,
-+			msi_mask_bits_reg(pos, is_64bit_address(control)),
-+			maskbits);
-+	}
-+
-+	return 0;
-+}
-+
- /**
-  * msi_capability_init - configure device's MSI capability structure
-  * @dev: pointer to the pci_dev data structure of MSI device function
-@@ -548,35 +759,8 @@ static int msi_capability_init(struct pc
- 	}
- 	/* Replace with MSI handler */
- 	irq_handler_init(PCI_CAP_ID_MSI, vector, entry->msi_attrib.maskbit);
--	/* Configure MSI capability structure */
--	msi_address_init(&address);
--	msi_data_init(&data, vector);
--	entry->msi_attrib.current_cpu = ((address.lo_address.u.dest_id >>
--				MSI_TARGET_CPU_SHIFT) & MSI_TARGET_CPU_MASK);
--	pci_write_config_dword(dev, msi_lower_address_reg(pos),
--			address.lo_address.value);
--	if (is_64bit_address(control)) {
--		pci_write_config_dword(dev,
--			msi_upper_address_reg(pos), address.hi_address);
--		pci_write_config_word(dev,
--			msi_data_reg(pos, 1), *((u32*)&data));
--	} else
--		pci_write_config_word(dev,
--			msi_data_reg(pos, 0), *((u32*)&data));
--	if (entry->msi_attrib.maskbit) {
--		unsigned int maskbits, temp;
--		/* All MSIs are unmasked by default, Mask them all */
--		pci_read_config_dword(dev,
--			msi_mask_bits_reg(pos, is_64bit_address(control)),
--			&maskbits);
--		temp = (1 << multi_msi_capable(control));
--		temp = ((temp - 1) & ~temp);
--		maskbits |= temp;
--		pci_write_config_dword(dev,
--			msi_mask_bits_reg(pos, is_64bit_address(control)),
--			maskbits);
--	}
- 	attach_msi_entry(entry, vector);
-+
- 	/* Set MSI enabled bits	 */
- 	enable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
- 
-@@ -730,8 +914,19 @@ int pci_enable_msi(struct pci_dev* dev)
- 			vector_irq[dev->irq] = -1;
- 			nr_released_vectors--;
- 			spin_unlock_irqrestore(&msi_lock, flags);
--			enable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
--			return 0;
-+			status = msi_register_init(dev, msi_desc[dev->irq]);
-+			if (status == 0) {
-+				enable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
-+				return 0;
-+			}
-+			/* Reroute failed, free the vector */
-+			spin_lock_irqsave(&msi_lock, flags);
-+			vector_irq[dev->irq] = 0; /* free it */
-+			nr_released_vectors++;
-+			spin_unlock_irqrestore(&msi_lock, flags);
-+			/* Restore dev->irq to its default pin-assertion vector */
-+			dev->irq = temp;
-+			return status;
- 		}
- 		spin_unlock_irqrestore(&msi_lock, flags);
- 		dev->irq = temp;
---- gregkh-2.6.orig/drivers/pci/pci.c
-+++ gregkh-2.6/drivers/pci/pci.c
-@@ -444,6 +444,11 @@ pci_save_state(struct pci_dev *dev)
- 	/* XXX: 100% dword access ok here? */
- 	for (i = 0; i < 16; i++)
- 		pci_read_config_dword(dev, i * 4,&dev->saved_config_space[i]);
-+	if ((i = pci_save_msi_state(dev)) != 0)
-+		return i;
-+	if ((i = pci_save_msix_state(dev)) != 0)
-+		return i;
-+
- 	return 0;
- }
- 
-@@ -458,6 +463,10 @@ pci_restore_state(struct pci_dev *dev)
- 
- 	for (i = 0; i < 16; i++)
- 		pci_write_config_dword(dev,i * 4, dev->saved_config_space[i]);
-+	if ((i = pci_restore_msi_state(dev)) != 0)
-+		return i;
-+	if ((i = pci_restore_msix_state(dev)) != 0)
-+		return i;
- 	return 0;
- }
- 
---- gregkh-2.6.orig/drivers/pci/pci.h
-+++ gregkh-2.6/drivers/pci/pci.h
-@@ -54,6 +54,18 @@ void disable_msi_mode(struct pci_dev *de
- static inline void disable_msi_mode(struct pci_dev *dev, int pos, int type) { }
- #endif
- 
-+#if defined(CONFIG_PCI_MSI) && defined(CONFIG_PM)
-+int pci_save_msi_state(struct pci_dev *dev);
-+int pci_save_msix_state(struct pci_dev *dev);
-+int pci_restore_msi_state(struct pci_dev *dev);
-+int pci_restore_msix_state(struct pci_dev *dev);
-+#else
-+static inline int pci_save_msi_state(struct pci_dev *dev) { return 0; }
-+static inline int pci_save_msix_state(struct pci_dev *dev) { return 0; }
-+static inline int pci_restore_msi_state(struct pci_dev *dev) { return 0; }
-+static inline int pci_restore_msix_state(struct pci_dev *dev) { return 0; }
-+#endif
-+
- extern int pcie_mch_quirk;
- extern struct device_attribute pci_dev_attrs[];
- extern struct class_device_attribute class_device_attr_cpuaffinity;
---- gregkh-2.6.orig/include/linux/pci.h
-+++ gregkh-2.6/include/linux/pci.h
-@@ -100,6 +100,12 @@ enum pci_bus_flags {
- 	PCI_BUS_FLAGS_NO_MSI = (pci_bus_flags_t) 1,
- };
- 
-+struct pci_cap_saved_state {
-+	struct hlist_node next;
-+	char cap_nr;
-+	u32 data[0];
-+};
-+
- /*
-  * The pci_dev structure is used to describe PCI devices.
-  */
-@@ -159,6 +165,7 @@ struct pci_dev {
- 	unsigned int	block_ucfg_access:1;	/* userspace config space access is blocked */
- 
- 	u32		saved_config_space[16]; /* config space saved at suspend time */
-+	struct hlist_head saved_cap_space;
- 	struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
- 	int rom_attr_enabled;		/* has display of the rom attribute been enabled? */
- 	struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
-@@ -169,6 +176,30 @@ struct pci_dev {
- #define	to_pci_dev(n) container_of(n, struct pci_dev, dev)
- #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
- 
-+static inline struct pci_cap_saved_state *pci_find_saved_cap(
-+	struct pci_dev *pci_dev,char cap)
-+{
-+	struct pci_cap_saved_state *tmp;
-+	struct hlist_node *pos;
-+
-+	hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
-+		if (tmp->cap_nr == cap)
-+			return tmp;
-+	}
-+	return NULL;
-+}
-+
-+static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
-+	struct pci_cap_saved_state *new_cap)
-+{
-+	hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
-+}
-+
-+static inline void pci_remove_saved_cap(struct pci_cap_saved_state *cap)
-+{
-+	hlist_del(&cap->next);
-+}
-+
- /*
-  *  For PCI devices, the region numbers are assigned this way:
-  *
diff --git a/pci/pci-rpaphp-remove-init-error-condition.patch b/pci/pci-rpaphp-remove-init-error-condition.patch
deleted file mode 100644
index 2e3098259dbc5..0000000000000
--- a/pci/pci-rpaphp-remove-init-error-condition.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From johnrose@austin.ibm.com Thu Mar 23 12:20:48 2006
-Subject: PCI: rpaphp: remove init error condition
-From: John Rose <johnrose@austin.ibm.com>
-To: Greg KH <greg@kroah.com>
-Message-Id: <1143145274.2567.2.camel@sinatra.austin.ibm.com>
-Date: Thu, 23 Mar 2006 14:21:14 -0600
-
-The init function for the RPA PCI Hotplug driver returns -ENODEV in the
-case that no hotplug-capable slots are detected in the system.  This is
-bad, since hot-capable slots can be added after boot to a purely virtual
-POWER partition.  This is also bad because DLPAR I/O operations depend
-on the rpaphp module.
-
-Change the rpaphp init module to return success for the case of
-partitions that own no hotplug-capable slots at boot.  Such slots can be
-dynamically added after boot.
-
-Signed-off-by: John Rose <johnrose@austin.ibm.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-
----
- drivers/pci/hotplug/rpaphp_core.c |    3 ---
- 1 file changed, 3 deletions(-)
-
---- gregkh-2.6.orig/drivers/pci/hotplug/rpaphp_core.c
-+++ gregkh-2.6/drivers/pci/hotplug/rpaphp_core.c
-@@ -360,9 +360,6 @@ static int __init rpaphp_init(void)
- 	while ((dn = of_find_node_by_type(dn, "pci")))
- 		rpaphp_add_slot(dn);
- 
--	if (!num_slots)
--		return -ENODEV;
--
- 	return 0;
- }
- 
diff --git a/pci/pci_ids.h-correct-naming-of-1022-7450.patch b/pci/pci_ids.h-correct-naming-of-1022-7450.patch
deleted file mode 100644
index 5913b3ae6fe2b..0000000000000
--- a/pci/pci_ids.h-correct-naming-of-1022-7450.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From linville@tuxdriver.com Mon Mar 20 11:34:09 2006
-Date: Mon, 20 Mar 2006 14:33:56 -0500
-From: "John W. Linville" <linville@tuxdriver.com>
-To: linux-kernel@vger.kernel.org
-Cc: gregkh@suse.de
-Subject: pci_ids.h: correct naming of 1022:7450 (AMD 8131 Bridge)
-Message-ID: <20060320193351.GC15746@tuxdriver.com>
-Content-Disposition: inline
-
-The naming of the constant defined for PCI ID 1022:7450 does not seem
-to match the information at http://pciids.sourceforge.net/:
-
-	http://pci-ids.ucw.cz/iii/?i=1022
-
-There 1022:7450 is listed as "AMD-8131 PCI-X Bridge" while 1022:7451
-is listed as "AMD-8131 PCI-X IOAPIC".  Yet, the current definition for
-0x7450 is PCI_DEVICE_ID_AMD_8131_APIC.	It seems to me like that name
-should map to 0x7451, while a name like PCI_DEVICE_ID_AMD_8131_BRIDGE
-should map to 0x7450.
-
-Signed-off-by: John W. Linville <linville@tuxdriver.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
----
-
----
- drivers/pci/quirks.c    |    2 +-
- include/linux/pci_ids.h |    3 ++-
- 2 files changed, 3 insertions(+), 2 deletions(-)
-
---- gregkh-2.6.orig/drivers/pci/quirks.c
-+++ gregkh-2.6/drivers/pci/quirks.c
-@@ -592,7 +592,7 @@ static void __init quirk_amd_8131_ioapic
-                 pci_write_config_byte( dev, AMD8131_MISC, tmp);
-         }
- } 
--DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_APIC,         quirk_amd_8131_ioapic ); 
-+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk_amd_8131_ioapic);
- 
- static void __init quirk_svw_msi(struct pci_dev *dev)
- {
---- gregkh-2.6.orig/include/linux/pci_ids.h
-+++ gregkh-2.6/include/linux/pci_ids.h
-@@ -500,7 +500,8 @@
- #define PCI_DEVICE_ID_AMD_8111_SMBUS	0x746b
- #define PCI_DEVICE_ID_AMD_8111_AUDIO	0x746d
- #define PCI_DEVICE_ID_AMD_8151_0	0x7454
--#define PCI_DEVICE_ID_AMD_8131_APIC     0x7450
-+#define PCI_DEVICE_ID_AMD_8131_BRIDGE	0x7450
-+#define PCI_DEVICE_ID_AMD_8131_APIC	0x7451
- #define PCI_DEVICE_ID_AMD_CS5536_ISA    0x2090
- #define PCI_DEVICE_ID_AMD_CS5536_FLASH  0x2091
- #define PCI_DEVICE_ID_AMD_CS5536_AUDIO  0x2093
diff --git a/pci/re-arch-i386-pci-irq.c-new-via-chipsets.patch b/pci/re-arch-i386-pci-irq.c-new-via-chipsets.patch
deleted file mode 100644
index e5ff215f34ddd..0000000000000
--- a/pci/re-arch-i386-pci-irq.c-new-via-chipsets.patch
+++ /dev/null
@@ -1,71 +0,0 @@
-From Grzegorz@Janoszka.pl Tue Mar 21 02:57:39 2006
-Date: Tue, 21 Mar 2006 11:57:19 +0100 (CET)
-From: Grzegorz Janoszka <Grzegorz@Janoszka.pl>
-To: gregkh@suse.de
-Subject: Re: arch/i386/pci/irq.c - new VIA chipsets (fwd)
-Message-ID: <Pine.GSO.4.63.0603211147580.11606@galaxy.agh.edu.pl>
-
-From: Grzegorz Janoszka <Grzegorz@Janoszka.pl>
-
-
-I use 2.6.15.6 Linux kernel and found some problems. I have about 100
-Linux boxes (all with the same (binary the same) kernel). Last time I have
-upgraded all those boxes from 2.4.32 to 2.6.15.6 (first 2.6.15.1, next .2,
-.4 and .6) and I have found some problems on VIA based PC's. Probably the
-reason of this is that some VIA chipsets are unrecognized by IRQ router.
-
-In line 586 there is: /* FIXME: add new ones for 8233/5 */
-
-There were only a few of chipsets ID's there, some of my VIA chipsets were
-not present and kernel used default IRQ router.
-
-I have added three entries, so that the code looks like:
-
-        case PCI_DEVICE_ID_VIA_82C596:
-        case PCI_DEVICE_ID_VIA_82C686:
-        case PCI_DEVICE_ID_VIA_8231:
-        case PCI_DEVICE_ID_VIA_8233A:
-        case PCI_DEVICE_ID_VIA_8235:
-        case PCI_DEVICE_ID_VIA_8237:
-        case PCI_DEVICE_ID_VIA_8237_SATA:
-                /* FIXME: add new ones for 8233/5 */
-                r->name = "VIA";
-                r->get = pirq_via_get;
-                r->set = pirq_via_set;
-                return 1;
-        }
-
-The kernel goes fine but I haven't testes it for weeks, I'm just a moment
-after reboot :)
-One thing is different (better?):
-Using previus kernel I had:
-PCI: Via IRQ fixup for 0000:00:0f.1, from 255 to 0
-now I have:
-PCI: Via IRQ fixup for 0000:00:0f.1, from 255 to 11
-
-Maybe it is good idea to add there some more VIA chipsets?
-The ones I have added seem to be OK.
-
-
-From: Grzegorz Janoszka <Grzegorz@Janoszka.pl>
-Acked-by: Martin Mares <mj@ucw.cz>
-Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-
-
----
- arch/i386/pci/irq.c |    3 +++
- 1 file changed, 3 insertions(+)
-
---- gregkh-2.6.orig/arch/i386/pci/irq.c
-+++ gregkh-2.6/arch/i386/pci/irq.c
-@@ -588,7 +588,10 @@ static __init int via_router_probe(struc
- 	case PCI_DEVICE_ID_VIA_82C596:
- 	case PCI_DEVICE_ID_VIA_82C686:
- 	case PCI_DEVICE_ID_VIA_8231:
-+	case PCI_DEVICE_ID_VIA_8233A:
- 	case PCI_DEVICE_ID_VIA_8235:
-+	case PCI_DEVICE_ID_VIA_8237:
-+	case PCI_DEVICE_ID_VIA_8237_SATA:
- 		/* FIXME: add new ones for 8233/5 */
- 		r->name = "VIA";
- 		r->get = pirq_via_get;
diff --git a/pci/remove-kernel-power-pm.c-pm_unregister.patch b/pci/remove-kernel-power-pm.c-pm_unregister.patch
deleted file mode 100644
index 1f13dc82dd027..0000000000000
--- a/pci/remove-kernel-power-pm.c-pm_unregister.patch
+++ /dev/null
@@ -1,83 +0,0 @@
-From akpm@osdl.org Fri Mar 31 01:38:43 2006
-Message-Id: <200603310938.k2V9cYKP014993@shell0.pdx.osdl.net>
-Subject: [patch 1/1] remove kernel/power/pm.c:pm_unregister()
-To: greg@kroah.com
-Cc: akpm@osdl.org, bunk@stusta.de, pavel@ucw.cz
-From: akpm@osdl.org
-Date: Fri, 31 Mar 2006 01:38:12 -0800
-
-
-From: Adrian Bunk <bunk@stusta.de>
-
-Since the last user is removed in -mm, we can now remove this long deprecated
-function.
-
-Signed-off-by: Adrian Bunk <bunk@stusta.de>
-Cc: Pavel Machek <pavel@ucw.cz>
-Signed-off-by: Andrew Morton <akpm@osdl.org>
-Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-
----
- include/linux/pm_legacy.h |    7 -------
- kernel/power/pm.c         |   20 --------------------
- 2 files changed, 27 deletions(-)
-
---- gregkh-2.6.orig/include/linux/pm_legacy.h
-+++ gregkh-2.6/include/linux/pm_legacy.h
-@@ -16,11 +16,6 @@ struct pm_dev __deprecated *
- pm_register(pm_dev_t type, unsigned long id, pm_callback callback);
- 
- /*
-- * Unregister a device with power management
-- */
--void __deprecated pm_unregister(struct pm_dev *dev);
--
--/*
-  * Unregister all devices with matching callback
-  */
- void __deprecated pm_unregister_all(pm_callback callback);
-@@ -41,8 +36,6 @@ static inline struct pm_dev *pm_register
- 	return NULL;
- }
- 
--static inline void pm_unregister(struct pm_dev *dev) {}
--
- static inline void pm_unregister_all(pm_callback callback) {}
- 
- static inline int pm_send_all(pm_request_t rqst, void *data)
---- gregkh-2.6.orig/kernel/power/pm.c
-+++ gregkh-2.6/kernel/power/pm.c
-@@ -75,25 +75,6 @@ struct pm_dev *pm_register(pm_dev_t type
- 	return dev;
- }
- 
--/**
-- *	pm_unregister -  unregister a device with power management
-- *	@dev: device to unregister
-- *
-- *	Remove a device from the power management notification lists. The
-- *	dev passed must be a handle previously returned by pm_register.
-- */
-- 
--void pm_unregister(struct pm_dev *dev)
--{
--	if (dev) {
--		mutex_lock(&pm_devs_lock);
--		list_del(&dev->entry);
--		mutex_unlock(&pm_devs_lock);
--
--		kfree(dev);
--	}
--}
--
- static void __pm_unregister(struct pm_dev *dev)
- {
- 	if (dev) {
-@@ -258,7 +239,6 @@ int pm_send_all(pm_request_t rqst, void 
- }
- 
- EXPORT_SYMBOL(pm_register);
--EXPORT_SYMBOL(pm_unregister);
- EXPORT_SYMBOL(pm_unregister_all);
- EXPORT_SYMBOL(pm_send_all);
- EXPORT_SYMBOL(pm_active);