diff options
author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2014-11-10 10:23:24 +0900 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2014-11-10 10:23:24 +0900 |
commit | 84bf1231bfe7bbba1d3a0a4de8fbd20900b07749 (patch) | |
tree | 6504d2d734e6ea2b72cc49bfeedd32a069e08c79 | |
parent | 98c466302c629523e9dcda12ecf908390f9ef69f (diff) | |
download | ltsi-kernel-84bf1231bfe7bbba1d3a0a4de8fbd20900b07749.tar.gz |
more intel mfd and watchdog patches
8 files changed, 691 insertions, 0 deletions
diff --git a/patches.intel/mfd-lpc_ich-add-device-ids-for-intel-9-series-pch.patch b/patches.intel/mfd-lpc_ich-add-device-ids-for-intel-9-series-pch.patch new file mode 100644 index 0000000000000..1613c2cb61ee3 --- /dev/null +++ b/patches.intel/mfd-lpc_ich-add-device-ids-for-intel-9-series-pch.patch @@ -0,0 +1,63 @@ +From ltsi-dev-bounces@lists.linuxfoundation.org Wed Nov 5 10:40:18 2014 +From: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> +Date: Wed, 5 Nov 2014 09:39:18 +0800 +Subject: [LTSI-dev] [PATCH 13/16] mfd: lpc_ich: Add Device IDs for Intel 9 Series PCH +To: LTSI Mailing List <ltsi-dev@lists.linuxfoundation.org> +Cc: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> +Message-ID: <1415151561-16047-14-git-send-email-rebecca.swee.fun.chang@intel.com> + + +From: James Ralston <james.d.ralston@intel.com> + +This patch adds the LPC Device IDs for the Intel 9 Series PCH. + +Signed-off-by: James Ralston <james.d.ralston@intel.com> +Signed-off-by: Lee Jones <lee.jones@linaro.org> +(cherry picked from commit fea31042ff613145c7784e2ce454bf3c151b97ba) + +Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> +--- + drivers/mfd/lpc_ich.c | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +--- a/drivers/mfd/lpc_ich.c ++++ b/drivers/mfd/lpc_ich.c +@@ -54,6 +54,7 @@ + * document number TBD : Avoton SoC + * document number TBD : Coleto Creek + * document number TBD : Wildcat Point-LP ++ * document number TBD : 9 Series + */ + + #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt +@@ -217,6 +218,7 @@ enum lpc_chipsets { + LPC_COLETO, /* Coleto Creek */ + LPC_WPT_LP, /* Wildcat Point-LP */ + LPC_BRASWELL, /* Braswell SoC */ ++ LPC_9S, /* 9 Series */ + }; + + static struct lpc_ich_info lpc_chipset_info[] = { +@@ -524,6 +526,10 @@ static struct lpc_ich_info lpc_chipset_i + .name = "Braswell SoC", + .iTCO_version = 3, + }, ++ [LPC_9S] = { ++ .name = "9 Series", ++ .iTCO_version = 2, ++ }, + }; + + /* +@@ -751,6 +757,11 @@ static const struct pci_device_id lpc_ic + { PCI_VDEVICE(INTEL, 0x9cc7), LPC_WPT_LP}, + { PCI_VDEVICE(INTEL, 0x9cc9), LPC_WPT_LP}, + { PCI_VDEVICE(INTEL, 0x229c), LPC_BRASWELL}, ++ { PCI_VDEVICE(INTEL, 0x8cc1), LPC_9S}, ++ { PCI_VDEVICE(INTEL, 0x8cc2), LPC_9S}, ++ { PCI_VDEVICE(INTEL, 0x8cc3), LPC_9S}, ++ { PCI_VDEVICE(INTEL, 0x8cc4), LPC_9S}, ++ { PCI_VDEVICE(INTEL, 0x8cc6), LPC_9S}, + { 0, }, /* End of list */ + }; + MODULE_DEVICE_TABLE(pci, lpc_ich_ids); diff --git a/patches.intel/mfd-lpc_ich-add-pci-id-for-intel-braswell.patch b/patches.intel/mfd-lpc_ich-add-pci-id-for-intel-braswell.patch new file mode 100644 index 0000000000000..fe29dbfed687a --- /dev/null +++ b/patches.intel/mfd-lpc_ich-add-pci-id-for-intel-braswell.patch @@ -0,0 +1,53 @@ +From ltsi-dev-bounces@lists.linuxfoundation.org Wed Nov 5 10:40:15 2014 +From: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> +Date: Wed, 5 Nov 2014 09:39:17 +0800 +Subject: [LTSI-dev] [PATCH 12/16] mfd: lpc_ich: Add PCI ID for Intel Braswell +To: LTSI Mailing List <ltsi-dev@lists.linuxfoundation.org> +Cc: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> +Message-ID: <1415151561-16047-13-git-send-email-rebecca.swee.fun.chang@intel.com> + + +From: Alan Cox <alan@linux.intel.com> + +This is the same as used in Baytrail so add the new PCI ID to the driver's +list of supported IDs. + +Signed-off-by: Alan Cox <alan@linux.intel.com> +Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> +Signed-off-by: Lee Jones <lee.jones@linaro.org> +(cherry picked from commit ff0c9da013d2c9f1ec232926a54e536ab48c6678) + +Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> +--- + drivers/mfd/lpc_ich.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +--- a/drivers/mfd/lpc_ich.c ++++ b/drivers/mfd/lpc_ich.c +@@ -216,6 +216,7 @@ enum lpc_chipsets { + LPC_BAYTRAIL, /* Bay Trail SoC */ + LPC_COLETO, /* Coleto Creek */ + LPC_WPT_LP, /* Wildcat Point-LP */ ++ LPC_BRASWELL, /* Braswell SoC */ + }; + + static struct lpc_ich_info lpc_chipset_info[] = { +@@ -519,6 +520,10 @@ static struct lpc_ich_info lpc_chipset_i + .name = "Wildcat Point_LP", + .iTCO_version = 2, + }, ++ [LPC_BRASWELL] = { ++ .name = "Braswell SoC", ++ .iTCO_version = 3, ++ }, + }; + + /* +@@ -745,6 +750,7 @@ static const struct pci_device_id lpc_ic + { PCI_VDEVICE(INTEL, 0x9cc6), LPC_WPT_LP}, + { PCI_VDEVICE(INTEL, 0x9cc7), LPC_WPT_LP}, + { PCI_VDEVICE(INTEL, 0x9cc9), LPC_WPT_LP}, ++ { PCI_VDEVICE(INTEL, 0x229c), LPC_BRASWELL}, + { 0, }, /* End of list */ + }; + MODULE_DEVICE_TABLE(pci, lpc_ich_ids); diff --git a/patches.intel/mfd-lpc_ich-add-support-for-intel-bay-trail-soc.patch b/patches.intel/mfd-lpc_ich-add-support-for-intel-bay-trail-soc.patch new file mode 100644 index 0000000000000..a403a0526c409 --- /dev/null +++ b/patches.intel/mfd-lpc_ich-add-support-for-intel-bay-trail-soc.patch @@ -0,0 +1,53 @@ +From ltsi-dev-bounces@lists.linuxfoundation.org Wed Nov 5 10:40:08 2014 +From: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> +Date: Wed, 5 Nov 2014 09:39:15 +0800 +Subject: [LTSI-dev] [PATCH 10/16] mfd: lpc_ich: Add support for Intel Bay Trail SoC +To: LTSI Mailing List <ltsi-dev@lists.linuxfoundation.org> +Cc: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> +Message-ID: <1415151561-16047-11-git-send-email-rebecca.swee.fun.chang@intel.com> + + +From: Peter Tyser <ptyser@xes-inc.com> + +This patch adds the LPC Controller Device IDs for Watchdog and GPIO for +the Intel Bay Trail Atom SoC. + +Signed-off-by: Peter Tyser <ptyser@xes-inc.com> +Reviewed-by: Guenter Roeck <linux@roeck-us.net> +Signed-off-by: Lee Jones <lee.jones@linaro.org> +(cherry picked from commit 6111ec70357022ccd037399c13f69900431850b4) + +Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> +--- + drivers/mfd/lpc_ich.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +--- a/drivers/mfd/lpc_ich.c ++++ b/drivers/mfd/lpc_ich.c +@@ -213,6 +213,7 @@ enum lpc_chipsets { + LPC_LPT_LP, /* Lynx Point-LP */ + LPC_WBG, /* Wellsburg */ + LPC_AVN, /* Avoton SoC */ ++ LPC_BAYTRAIL, /* Bay Trail SoC */ + LPC_COLETO, /* Coleto Creek */ + LPC_WPT_LP, /* Wildcat Point-LP */ + }; +@@ -505,6 +506,10 @@ static struct lpc_ich_info lpc_chipset_i + .iTCO_version = 3, + .gpio_version = AVOTON_GPIO, + }, ++ [LPC_BAYTRAIL] = { ++ .name = "Bay Trail SoC", ++ .iTCO_version = 3, ++ }, + [LPC_COLETO] = { + .name = "Coleto Creek", + .iTCO_version = 2, +@@ -730,6 +735,7 @@ static const struct pci_device_id lpc_ic + { PCI_VDEVICE(INTEL, 0x1f39), LPC_AVN}, + { PCI_VDEVICE(INTEL, 0x1f3a), LPC_AVN}, + { PCI_VDEVICE(INTEL, 0x1f3b), LPC_AVN}, ++ { PCI_VDEVICE(INTEL, 0x0f1c), LPC_BAYTRAIL}, + { PCI_VDEVICE(INTEL, 0x2390), LPC_COLETO}, + { PCI_VDEVICE(INTEL, 0x9cc1), LPC_WPT_LP}, + { PCI_VDEVICE(INTEL, 0x9cc2), LPC_WPT_LP}, diff --git a/patches.intel/mfd-lpc_ich-enable-gpio-for-panther-point.patch b/patches.intel/mfd-lpc_ich-enable-gpio-for-panther-point.patch new file mode 100644 index 0000000000000..5611e58303151 --- /dev/null +++ b/patches.intel/mfd-lpc_ich-enable-gpio-for-panther-point.patch @@ -0,0 +1,32 @@ +From ltsi-dev-bounces@lists.linuxfoundation.org Wed Nov 5 10:40:11 2014 +From: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> +Date: Wed, 5 Nov 2014 09:39:16 +0800 +Subject: [LTSI-dev] [PATCH 11/16] mfd: lpc_ich: Enable GPIO for Panther Point +To: LTSI Mailing List <ltsi-dev@lists.linuxfoundation.org> +Cc: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> +Message-ID: <1415151561-16047-12-git-send-email-rebecca.swee.fun.chang@intel.com> + + +From: Guenter Roeck <linux@roeck-us.net> + +Panther Point PCH GPIO configuration is similar to V5 PCHs. + +Signed-off-by: Guenter Roeck <linux@roeck-us.net> +Signed-off-by: Lee Jones <lee.jones@linaro.org> +(cherry picked from commit 62cf2cdb99c7e870ab857bdd617e728790f8c43c) + +Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> +--- + drivers/mfd/lpc_ich.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/mfd/lpc_ich.c ++++ b/drivers/mfd/lpc_ich.c +@@ -488,6 +488,7 @@ static struct lpc_ich_info lpc_chipset_i + [LPC_PPT] = { + .name = "Panther Point", + .iTCO_version = 2, ++ .gpio_version = ICH_V5_GPIO, + }, + [LPC_LPT] = { + .name = "Lynx Point", diff --git a/patches.intel/watchdog-fix-checkpatch-warnings-and-error.patch b/patches.intel/watchdog-fix-checkpatch-warnings-and-error.patch new file mode 100644 index 0000000000000..bdf7acb005d6b --- /dev/null +++ b/patches.intel/watchdog-fix-checkpatch-warnings-and-error.patch @@ -0,0 +1,126 @@ +From ltsi-dev-bounces@lists.linuxfoundation.org Wed Nov 5 10:40:26 2014 +From: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> +Date: Wed, 5 Nov 2014 09:39:20 +0800 +Subject: [LTSI-dev] [PATCH 15/16] watchdog: fix checkpatch warnings and error +To: LTSI Mailing List <ltsi-dev@lists.linuxfoundation.org> +Cc: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> +Message-ID: <1415151561-16047-16-git-send-email-rebecca.swee.fun.chang@intel.com> + + +From: Jingoo Han <jg1.han@samsung.com> + +Fix the following checkpatch warnings and error: + WARNING: quoted string split across lines + WARNING: braces {} are not necessary for single statement blocks + WARNING: __initdata should be placed after ibmasr_id_table[] + WARNING: please, no space before tabs + ERROR: do not initialise statics to 0 or NULL + +Signed-off-by: Jingoo Han <jg1.han@samsung.com> +Reviewed-by: Guenter Roeck <linux@roeck-us.net> +Signed-off-by: Wim Van Sebroeck <wim@iguana.be> +(cherry picked from commit 5f5e19093b2fa592720810154f15ffe51aa9277f) + +Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> +--- + drivers/watchdog/ep93xx_wdt.c | 6 +++--- + drivers/watchdog/iTCO_wdt.c | 6 +++--- + drivers/watchdog/ibmasr.c | 2 +- + drivers/watchdog/pc87413_wdt.c | 7 +++---- + drivers/watchdog/softdog.c | 2 +- + drivers/watchdog/w83697hf_wdt.c | 4 ++-- + 6 files changed, 13 insertions(+), 14 deletions(-) + +--- a/drivers/watchdog/ep93xx_wdt.c ++++ b/drivers/watchdog/ep93xx_wdt.c +@@ -172,9 +172,9 @@ static struct platform_driver ep93xx_wdt + + module_platform_driver(ep93xx_wdt_driver); + +-MODULE_AUTHOR("Ray Lehtiniemi <rayl@mail.com>," +- "Alessandro Zummo <a.zummo@towertech.it>," +- "H Hartley Sweeten <hsweeten@visionengravers.com>"); ++MODULE_AUTHOR("Ray Lehtiniemi <rayl@mail.com>"); ++MODULE_AUTHOR("Alessandro Zummo <a.zummo@towertech.it>"); ++MODULE_AUTHOR("H Hartley Sweeten <hsweeten@visionengravers.com>"); + MODULE_DESCRIPTION("EP93xx Watchdog"); + MODULE_LICENSE("GPL"); + MODULE_VERSION(WDT_VERSION); +--- a/drivers/watchdog/iTCO_wdt.c ++++ b/drivers/watchdog/iTCO_wdt.c +@@ -370,15 +370,15 @@ static const struct watchdog_info ident + static const struct watchdog_ops iTCO_wdt_ops = { + .owner = THIS_MODULE, + .start = iTCO_wdt_start, +- .stop = iTCO_wdt_stop, +- .ping = iTCO_wdt_ping, ++ .stop = iTCO_wdt_stop, ++ .ping = iTCO_wdt_ping, + .set_timeout = iTCO_wdt_set_timeout, + .get_timeleft = iTCO_wdt_get_timeleft, + }; + + static struct watchdog_device iTCO_wdt_watchdog_dev = { + .info = &ident, +- .ops = &iTCO_wdt_ops, ++ .ops = &iTCO_wdt_ops, + }; + + /* +--- a/drivers/watchdog/ibmasr.c ++++ b/drivers/watchdog/ibmasr.c +@@ -360,7 +360,7 @@ struct ibmasr_id { + int type; + }; + +-static struct ibmasr_id __initdata ibmasr_id_table[] = { ++static struct ibmasr_id ibmasr_id_table[] __initdata = { + { "IBM Automatic Server Restart - eserver xSeries 220", ASMTYPE_TOPAZ }, + { "IBM Automatic Server Restart - Machine Type 8673", ASMTYPE_PEARL }, + { "IBM Automatic Server Restart - Machine Type 8480", ASMTYPE_JASPER }, +--- a/drivers/watchdog/pc87413_wdt.c ++++ b/drivers/watchdog/pc87413_wdt.c +@@ -512,9 +512,8 @@ static int __init pc87413_init(void) + return -EBUSY; + + ret = register_reboot_notifier(&pc87413_notifier); +- if (ret != 0) { ++ if (ret != 0) + pr_err("cannot register reboot notifier (err=%d)\n", ret); +- } + + ret = misc_register(&pc87413_miscdev); + if (ret != 0) { +@@ -575,8 +574,8 @@ static void __exit pc87413_exit(void) + module_init(pc87413_init); + module_exit(pc87413_exit); + +-MODULE_AUTHOR("Sven Anders <anders@anduras.de>, " +- "Marcus Junker <junker@anduras.de>,"); ++MODULE_AUTHOR("Sven Anders <anders@anduras.de>"); ++MODULE_AUTHOR("Marcus Junker <junker@anduras.de>"); + MODULE_DESCRIPTION("PC87413 WDT driver"); + MODULE_LICENSE("GPL"); + +--- a/drivers/watchdog/softdog.c ++++ b/drivers/watchdog/softdog.c +@@ -62,7 +62,7 @@ MODULE_PARM_DESC(nowayout, + "Watchdog cannot be stopped once started (default=" + __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); + +-static int soft_noboot = 0; ++static int soft_noboot; + module_param(soft_noboot, int, 0); + MODULE_PARM_DESC(soft_noboot, + "Softdog action, set to 1 to ignore reboots, 0 to reboot (default=0)"); +--- a/drivers/watchdog/w83697hf_wdt.c ++++ b/drivers/watchdog/w83697hf_wdt.c +@@ -455,6 +455,6 @@ module_init(wdt_init); + module_exit(wdt_exit); + + MODULE_LICENSE("GPL"); +-MODULE_AUTHOR("Marcus Junker <junker@anduras.de>, " +- "Samuel Tardieu <sam@rfc1149.net>"); ++MODULE_AUTHOR("Marcus Junker <junker@anduras.de>"); ++MODULE_AUTHOR("Samuel Tardieu <sam@rfc1149.net>"); + MODULE_DESCRIPTION("w83697hf/hg WDT driver"); diff --git a/patches.intel/watchdog-itco_wdt-add-support-for-v3-silicon.patch b/patches.intel/watchdog-itco_wdt-add-support-for-v3-silicon.patch new file mode 100644 index 0000000000000..3a0e6129f18fa --- /dev/null +++ b/patches.intel/watchdog-itco_wdt-add-support-for-v3-silicon.patch @@ -0,0 +1,320 @@ +From ltsi-dev-bounces@lists.linuxfoundation.org Wed Nov 5 10:40:22 2014 +From: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> +Date: Wed, 5 Nov 2014 09:39:19 +0800 +Subject: [LTSI-dev] [PATCH 14/16] watchdog: iTCO_wdt: Add support for v3 silicon +To: LTSI Mailing List <ltsi-dev@lists.linuxfoundation.org> +Cc: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> +Message-ID: <1415151561-16047-15-git-send-email-rebecca.swee.fun.chang@intel.com> + + +From: Peter Tyser <ptyser@xes-inc.com> + +Some new Atom's, eg Avoton and Bay Trail, have slightly different iTCO +functionality: +- The watchdog timer ticks at 1 second instead of .6 seconds + +- Some 8 and 16-bit registers were combined into 32-bit registers + +- Some registers were removed (DAT_IN, DAT_OUT, MESSAGE) + +- The BOOT_STS field in TCO_STS was removed + +- The NO_REBOOT bit is in the PMC area instead of GCS + +Update the driver to support the above changes and bump the version to +1.11. + +Signed-off-by: Peter Tyser <ptyser@xes-inc.com> +Tested-by: Rajat Jain <rajatjain@juniper.net> +Reviewed-by: Guenter Roeck <linux@roeck-us.net> +Signed-off-by: Lee Jones <lee.jones@linaro.org> +(cherry picked from commit 24b3a1670b47e75be633ae0b5c07945c446f9d29) + +Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> +--- + drivers/watchdog/iTCO_wdt.c | 137 ++++++++++++++++++++++++++------------------ + 1 file changed, 82 insertions(+), 55 deletions(-) + +--- a/drivers/watchdog/iTCO_wdt.c ++++ b/drivers/watchdog/iTCO_wdt.c +@@ -48,7 +48,7 @@ + + /* Module and version information */ + #define DRV_NAME "iTCO_wdt" +-#define DRV_VERSION "1.10" ++#define DRV_VERSION "1.11" + + /* Includes */ + #include <linux/module.h> /* For module specific items */ +@@ -92,9 +92,12 @@ static struct { /* this is private data + unsigned int iTCO_version; + struct resource *tco_res; + struct resource *smi_res; +- struct resource *gcs_res; +- /* NO_REBOOT flag is Memory-Mapped GCS register bit 5 (TCO version 2)*/ +- unsigned long __iomem *gcs; ++ /* ++ * NO_REBOOT flag is Memory-Mapped GCS register bit 5 (TCO version 2), ++ * or memory-mapped PMC register bit 4 (TCO version 3). ++ */ ++ struct resource *gcs_pmc_res; ++ unsigned long __iomem *gcs_pmc; + /* the lock for io operations */ + spinlock_t io_lock; + struct platform_device *dev; +@@ -125,11 +128,19 @@ MODULE_PARM_DESC(turn_SMI_watchdog_clear + * Some TCO specific functions + */ + +-static inline unsigned int seconds_to_ticks(int seconds) ++/* ++ * The iTCO v1 and v2's internal timer is stored as ticks which decrement ++ * every 0.6 seconds. v3's internal timer is stored as seconds (some ++ * datasheets incorrectly state 0.6 seconds). ++ */ ++static inline unsigned int seconds_to_ticks(int secs) + { +- /* the internal timer is stored as ticks which decrement +- * every 0.6 seconds */ +- return (seconds * 10) / 6; ++ return iTCO_wdt_private.iTCO_version == 3 ? secs : (secs * 10) / 6; ++} ++ ++static inline unsigned int ticks_to_seconds(int ticks) ++{ ++ return iTCO_wdt_private.iTCO_version == 3 ? ticks : (ticks * 6) / 10; + } + + static void iTCO_wdt_set_NO_REBOOT_bit(void) +@@ -137,10 +148,14 @@ static void iTCO_wdt_set_NO_REBOOT_bit(v + u32 val32; + + /* Set the NO_REBOOT bit: this disables reboots */ +- if (iTCO_wdt_private.iTCO_version == 2) { +- val32 = readl(iTCO_wdt_private.gcs); ++ if (iTCO_wdt_private.iTCO_version == 3) { ++ val32 = readl(iTCO_wdt_private.gcs_pmc); ++ val32 |= 0x00000010; ++ writel(val32, iTCO_wdt_private.gcs_pmc); ++ } else if (iTCO_wdt_private.iTCO_version == 2) { ++ val32 = readl(iTCO_wdt_private.gcs_pmc); + val32 |= 0x00000020; +- writel(val32, iTCO_wdt_private.gcs); ++ writel(val32, iTCO_wdt_private.gcs_pmc); + } else if (iTCO_wdt_private.iTCO_version == 1) { + pci_read_config_dword(iTCO_wdt_private.pdev, 0xd4, &val32); + val32 |= 0x00000002; +@@ -154,12 +169,20 @@ static int iTCO_wdt_unset_NO_REBOOT_bit( + u32 val32; + + /* Unset the NO_REBOOT bit: this enables reboots */ +- if (iTCO_wdt_private.iTCO_version == 2) { +- val32 = readl(iTCO_wdt_private.gcs); ++ if (iTCO_wdt_private.iTCO_version == 3) { ++ val32 = readl(iTCO_wdt_private.gcs_pmc); ++ val32 &= 0xffffffef; ++ writel(val32, iTCO_wdt_private.gcs_pmc); ++ ++ val32 = readl(iTCO_wdt_private.gcs_pmc); ++ if (val32 & 0x00000010) ++ ret = -EIO; ++ } else if (iTCO_wdt_private.iTCO_version == 2) { ++ val32 = readl(iTCO_wdt_private.gcs_pmc); + val32 &= 0xffffffdf; +- writel(val32, iTCO_wdt_private.gcs); ++ writel(val32, iTCO_wdt_private.gcs_pmc); + +- val32 = readl(iTCO_wdt_private.gcs); ++ val32 = readl(iTCO_wdt_private.gcs_pmc); + if (val32 & 0x00000020) + ret = -EIO; + } else if (iTCO_wdt_private.iTCO_version == 1) { +@@ -192,7 +215,7 @@ static int iTCO_wdt_start(struct watchdo + + /* Force the timer to its reload value by writing to the TCO_RLD + register */ +- if (iTCO_wdt_private.iTCO_version == 2) ++ if (iTCO_wdt_private.iTCO_version >= 2) + outw(0x01, TCO_RLD); + else if (iTCO_wdt_private.iTCO_version == 1) + outb(0x01, TCO_RLD); +@@ -240,9 +263,9 @@ static int iTCO_wdt_ping(struct watchdog + iTCO_vendor_pre_keepalive(iTCO_wdt_private.smi_res, wd_dev->timeout); + + /* Reload the timer by writing to the TCO Timer Counter register */ +- if (iTCO_wdt_private.iTCO_version == 2) ++ if (iTCO_wdt_private.iTCO_version >= 2) { + outw(0x01, TCO_RLD); +- else if (iTCO_wdt_private.iTCO_version == 1) { ++ } else if (iTCO_wdt_private.iTCO_version == 1) { + /* Reset the timeout status bit so that the timer + * needs to count down twice again before rebooting */ + outw(0x0008, TCO1_STS); /* write 1 to clear bit */ +@@ -270,14 +293,14 @@ static int iTCO_wdt_set_timeout(struct w + /* "Values of 0h-3h are ignored and should not be attempted" */ + if (tmrval < 0x04) + return -EINVAL; +- if (((iTCO_wdt_private.iTCO_version == 2) && (tmrval > 0x3ff)) || ++ if (((iTCO_wdt_private.iTCO_version >= 2) && (tmrval > 0x3ff)) || + ((iTCO_wdt_private.iTCO_version == 1) && (tmrval > 0x03f))) + return -EINVAL; + + iTCO_vendor_pre_set_heartbeat(tmrval); + + /* Write new heartbeat to watchdog */ +- if (iTCO_wdt_private.iTCO_version == 2) { ++ if (iTCO_wdt_private.iTCO_version >= 2) { + spin_lock(&iTCO_wdt_private.io_lock); + val16 = inw(TCOv2_TMR); + val16 &= 0xfc00; +@@ -312,13 +335,13 @@ static unsigned int iTCO_wdt_get_timelef + unsigned int time_left = 0; + + /* read the TCO Timer */ +- if (iTCO_wdt_private.iTCO_version == 2) { ++ if (iTCO_wdt_private.iTCO_version >= 2) { + spin_lock(&iTCO_wdt_private.io_lock); + val16 = inw(TCO_RLD); + val16 &= 0x3ff; + spin_unlock(&iTCO_wdt_private.io_lock); + +- time_left = (val16 * 6) / 10; ++ time_left = ticks_to_seconds(val16); + } else if (iTCO_wdt_private.iTCO_version == 1) { + spin_lock(&iTCO_wdt_private.io_lock); + val8 = inb(TCO_RLD); +@@ -327,7 +350,7 @@ static unsigned int iTCO_wdt_get_timelef + val8 += (inb(TCOv1_TMR) & 0x3f); + spin_unlock(&iTCO_wdt_private.io_lock); + +- time_left = (val8 * 6) / 10; ++ time_left = ticks_to_seconds(val8); + } + return time_left; + } +@@ -376,16 +399,16 @@ static void iTCO_wdt_cleanup(void) + resource_size(iTCO_wdt_private.tco_res)); + release_region(iTCO_wdt_private.smi_res->start, + resource_size(iTCO_wdt_private.smi_res)); +- if (iTCO_wdt_private.iTCO_version == 2) { +- iounmap(iTCO_wdt_private.gcs); +- release_mem_region(iTCO_wdt_private.gcs_res->start, +- resource_size(iTCO_wdt_private.gcs_res)); ++ if (iTCO_wdt_private.iTCO_version >= 2) { ++ iounmap(iTCO_wdt_private.gcs_pmc); ++ release_mem_region(iTCO_wdt_private.gcs_pmc_res->start, ++ resource_size(iTCO_wdt_private.gcs_pmc_res)); + } + + iTCO_wdt_private.tco_res = NULL; + iTCO_wdt_private.smi_res = NULL; +- iTCO_wdt_private.gcs_res = NULL; +- iTCO_wdt_private.gcs = NULL; ++ iTCO_wdt_private.gcs_pmc_res = NULL; ++ iTCO_wdt_private.gcs_pmc = NULL; + } + + static int iTCO_wdt_probe(struct platform_device *dev) +@@ -414,27 +437,27 @@ static int iTCO_wdt_probe(struct platfor + iTCO_wdt_private.pdev = to_pci_dev(dev->dev.parent); + + /* +- * Get the Memory-Mapped GCS register, we need it for the +- * NO_REBOOT flag (TCO v2). ++ * Get the Memory-Mapped GCS or PMC register, we need it for the ++ * NO_REBOOT flag (TCO v2 and v3). + */ +- if (iTCO_wdt_private.iTCO_version == 2) { +- iTCO_wdt_private.gcs_res = platform_get_resource(dev, ++ if (iTCO_wdt_private.iTCO_version >= 2) { ++ iTCO_wdt_private.gcs_pmc_res = platform_get_resource(dev, + IORESOURCE_MEM, +- ICH_RES_MEM_GCS); ++ ICH_RES_MEM_GCS_PMC); + +- if (!iTCO_wdt_private.gcs_res) ++ if (!iTCO_wdt_private.gcs_pmc_res) + goto out; + +- if (!request_mem_region(iTCO_wdt_private.gcs_res->start, +- resource_size(iTCO_wdt_private.gcs_res), dev->name)) { ++ if (!request_mem_region(iTCO_wdt_private.gcs_pmc_res->start, ++ resource_size(iTCO_wdt_private.gcs_pmc_res), dev->name)) { + ret = -EBUSY; + goto out; + } +- iTCO_wdt_private.gcs = ioremap(iTCO_wdt_private.gcs_res->start, +- resource_size(iTCO_wdt_private.gcs_res)); +- if (!iTCO_wdt_private.gcs) { ++ iTCO_wdt_private.gcs_pmc = ioremap(iTCO_wdt_private.gcs_pmc_res->start, ++ resource_size(iTCO_wdt_private.gcs_pmc_res)); ++ if (!iTCO_wdt_private.gcs_pmc) { + ret = -EIO; +- goto unreg_gcs; ++ goto unreg_gcs_pmc; + } + } + +@@ -442,7 +465,7 @@ static int iTCO_wdt_probe(struct platfor + if (iTCO_wdt_unset_NO_REBOOT_bit() && iTCO_vendor_check_noreboot_on()) { + pr_info("unable to reset NO_REBOOT flag, device disabled by hardware/BIOS\n"); + ret = -ENODEV; /* Cannot reset NO_REBOOT bit */ +- goto unmap_gcs; ++ goto unmap_gcs_pmc; + } + + /* Set the NO_REBOOT bit to prevent later reboots, just for sure */ +@@ -454,7 +477,7 @@ static int iTCO_wdt_probe(struct platfor + pr_err("I/O address 0x%04llx already in use, device disabled\n", + (u64)SMI_EN); + ret = -EBUSY; +- goto unmap_gcs; ++ goto unmap_gcs_pmc; + } + if (turn_SMI_watchdog_clear_off >= iTCO_wdt_private.iTCO_version) { + /* +@@ -478,9 +501,13 @@ static int iTCO_wdt_probe(struct platfor + ich_info->name, ich_info->iTCO_version, (u64)TCOBASE); + + /* Clear out the (probably old) status */ +- outw(0x0008, TCO1_STS); /* Clear the Time Out Status bit */ +- outw(0x0002, TCO2_STS); /* Clear SECOND_TO_STS bit */ +- outw(0x0004, TCO2_STS); /* Clear BOOT_STS bit */ ++ if (iTCO_wdt_private.iTCO_version == 3) { ++ outl(0x20008, TCO1_STS); ++ } else { ++ outw(0x0008, TCO1_STS); /* Clear the Time Out Status bit */ ++ outw(0x0002, TCO2_STS); /* Clear SECOND_TO_STS bit */ ++ outw(0x0004, TCO2_STS); /* Clear BOOT_STS bit */ ++ } + + iTCO_wdt_watchdog_dev.bootstatus = 0; + iTCO_wdt_watchdog_dev.timeout = WATCHDOG_TIMEOUT; +@@ -515,18 +542,18 @@ unreg_tco: + unreg_smi: + release_region(iTCO_wdt_private.smi_res->start, + resource_size(iTCO_wdt_private.smi_res)); +-unmap_gcs: +- if (iTCO_wdt_private.iTCO_version == 2) +- iounmap(iTCO_wdt_private.gcs); +-unreg_gcs: +- if (iTCO_wdt_private.iTCO_version == 2) +- release_mem_region(iTCO_wdt_private.gcs_res->start, +- resource_size(iTCO_wdt_private.gcs_res)); ++unmap_gcs_pmc: ++ if (iTCO_wdt_private.iTCO_version >= 2) ++ iounmap(iTCO_wdt_private.gcs_pmc); ++unreg_gcs_pmc: ++ if (iTCO_wdt_private.iTCO_version >= 2) ++ release_mem_region(iTCO_wdt_private.gcs_pmc_res->start, ++ resource_size(iTCO_wdt_private.gcs_pmc_res)); + out: + iTCO_wdt_private.tco_res = NULL; + iTCO_wdt_private.smi_res = NULL; +- iTCO_wdt_private.gcs_res = NULL; +- iTCO_wdt_private.gcs = NULL; ++ iTCO_wdt_private.gcs_pmc_res = NULL; ++ iTCO_wdt_private.gcs_pmc = NULL; + + return ret; + } diff --git a/patches.intel/watchdog-itco_wdt-fix-the-parent-device.patch b/patches.intel/watchdog-itco_wdt-fix-the-parent-device.patch new file mode 100644 index 0000000000000..2e5a854fcb85c --- /dev/null +++ b/patches.intel/watchdog-itco_wdt-fix-the-parent-device.patch @@ -0,0 +1,37 @@ +From ltsi-dev-bounces@lists.linuxfoundation.org Wed Nov 5 10:40:29 2014 +From: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> +Date: Wed, 5 Nov 2014 09:39:21 +0800 +Subject: [LTSI-dev] [PATCH 16/16] watchdog: iTCO_wdt: Fix the parent device +To: LTSI Mailing List <ltsi-dev@lists.linuxfoundation.org> +Cc: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> +Message-ID: <1415151561-16047-17-git-send-email-rebecca.swee.fun.chang@intel.com> + + +From: Jean Delvare <jdelvare@suse.de> + +The watchdog's parent is iTCO_wdt (the platform device) not lpc_ich +(the PCI device.) Setting the parent right makes it much easier for +the user to figure out which driver/module is handling the watchdog +device node. + +Signed-off-by: Jean Delvare <jdelvare@suse.de> +Reviewed-by: Guenter Roeck <linux@roeck-us.net> +Signed-off-by: Wim Van Sebroeck <wim@iguana.be> +(cherry picked from commit c90789baa8cec363093c5ec292c989b6f22d8f32) + +Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> +--- + drivers/watchdog/iTCO_wdt.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/watchdog/iTCO_wdt.c ++++ b/drivers/watchdog/iTCO_wdt.c +@@ -512,7 +512,7 @@ static int iTCO_wdt_probe(struct platfor + iTCO_wdt_watchdog_dev.bootstatus = 0; + iTCO_wdt_watchdog_dev.timeout = WATCHDOG_TIMEOUT; + watchdog_set_nowayout(&iTCO_wdt_watchdog_dev, nowayout); +- iTCO_wdt_watchdog_dev.parent = dev->dev.parent; ++ iTCO_wdt_watchdog_dev.parent = &dev->dev; + + /* Make sure the watchdog is not running */ + iTCO_wdt_stop(&iTCO_wdt_watchdog_dev); @@ -1040,6 +1040,13 @@ patches.intel/mfd-lpc_ich-remove-lpc_ich_cfg-struct-use.patch patches.intel/mfd-lpc_ich-add-support-for-itco-v3.patch patches.intel/mfd-lpc_ich-change-avoton-to-itco-v3.patch patches.intel/mfd-lpc_ich-add-support-for-nm10-gpio.patch +patches.intel/mfd-lpc_ich-add-support-for-intel-bay-trail-soc.patch +patches.intel/mfd-lpc_ich-enable-gpio-for-panther-point.patch +patches.intel/mfd-lpc_ich-add-pci-id-for-intel-braswell.patch +patches.intel/mfd-lpc_ich-add-device-ids-for-intel-9-series-pch.patch +patches.intel/watchdog-itco_wdt-add-support-for-v3-silicon.patch +patches.intel/watchdog-fix-checkpatch-warnings-and-error.patch +patches.intel/watchdog-itco_wdt-fix-the-parent-device.patch ############################################################################# |