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authorQuentin Schulz <quentin.schulz@theobroma-systems.com>2024-03-08 16:46:09 +0100
committerHeiko Stuebner <heiko@sntech.de>2024-03-24 23:32:49 +0100
commitd8bdab44b3fe3e966073ddadd030e4eca7aedc35 (patch)
treea8466185069555043dded1a45d3ed5f7921499ae
parent1331876fe9c89079f7b856e717be93a62b96b3db (diff)
downloaddevicetree-rebasing-d8bdab44b3fe3e966073ddadd030e4eca7aedc35.tar.gz
arm64: dts: rockchip: add regulators for PCIe on RK3399 Puma Haikou
The PCIe PHY requires two regulators and are present on the SoM directly, while the PCIe connector also exposes 3V3 and 12V power rails which are available on the baseboard. Considering that 3/4 regulators are always-on on HW level and that the last one depends on a regulator from the PMIC that is specified as always on, this commit should be purely cosmetic and no change in behavior is expected. Let's add all regulators for PCIe on RK3399 Puma Haikou. Reviewed-by: Dragan Simic <dsimic@manjaro.org> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Link: https://lore.kernel.org/r/20240308-puma-diode-pu-v2-3-309f83da110a@theobroma-systems.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: d7ed698abc28b2886c9fc71d17ca6b023fcf47f3 ]
-rw-r--r--src/arm64/rockchip/rk3399-puma-haikou.dts2
-rw-r--r--src/arm64/rockchip/rk3399-puma.dtsi26
2 files changed, 28 insertions, 0 deletions
diff --git a/src/arm64/rockchip/rk3399-puma-haikou.dts b/src/arm64/rockchip/rk3399-puma-haikou.dts
index 2c3984a880af64..f6f15946579ebf 100644
--- a/src/arm64/rockchip/rk3399-puma-haikou.dts
+++ b/src/arm64/rockchip/rk3399-puma-haikou.dts
@@ -194,6 +194,8 @@
num-lanes = <4>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_clkreqn_cpm>;
+ vpcie3v3-supply = <&vcc3v3_baseboard>;
+ vpcie12v-supply = <&dc_12v>;
status = "okay";
};
diff --git a/src/arm64/rockchip/rk3399-puma.dtsi b/src/arm64/rockchip/rk3399-puma.dtsi
index 2484ad2bd86fcb..ccbe3a7a1d2c2f 100644
--- a/src/arm64/rockchip/rk3399-puma.dtsi
+++ b/src/arm64/rockchip/rk3399-puma.dtsi
@@ -79,6 +79,26 @@
regulator-max-microvolt = <5000000>;
};
+ vcca_0v9: vcca-0v9-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcca_0v9";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+ vin-supply = <&vcc_1v8>;
+ };
+
+ vcca_1v8: vcca-1v8-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcca_1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc3v3_sys>;
+ };
+
vdd_log: vdd-log {
compatible = "pwm-regulator";
pwms = <&pwm2 0 25000 1>;
@@ -416,6 +436,12 @@
gpio1830-supply = <&vcc_1v8>;
};
+&pcie0 {
+ /* PCIe PHY supplies */
+ vpcie0v9-supply = <&vcca_0v9>;
+ vpcie1v8-supply = <&vcca_1v8>;
+};
+
&pcie_clkreqn_cpm {
rockchip,pins =
<2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>;