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authorBen Hutchings <ben@decadent.org.uk>2020-01-26 18:30:42 +0000
committerBen Hutchings <ben@decadent.org.uk>2020-01-26 18:30:48 +0000
commit895d926cf7967ae05c0bbf4b974b54ec8cbf88f1 (patch)
tree9dde0ab707cd56b28af1c6537918551ced5fcae1
parent085bcee967542ff62f963d7a408ea0231dc5efd1 (diff)
downloadlinux-stable-queue-895d926cf7967ae05c0bbf4b974b54ec8cbf88f1.tar.gz
Add fixes requested for stable, plus an obvious dependency
-rw-r--r--queue-3.16/net-davinci_cpdma-use-dma_addr_t-for-dma-address.patch78
-rw-r--r--queue-3.16/net-stmmac-don-t-stop-napi-processing-when-dropping-a-packet.patch75
-rw-r--r--queue-3.16/net-stmmac-use-correct-dma-buffer-size-in-the-rx-descriptor.patch142
-rw-r--r--queue-3.16/pstore-ram-write-new-dumps-to-start-of-recycled-zones.patch45
-rw-r--r--queue-3.16/series6
-rw-r--r--queue-3.16/stmmac-fix-oversized-frame-reception.patch37
-rw-r--r--queue-3.16/x86-treat-r_x86_64_plt32-as-r_x86_64_pc32.patch65
7 files changed, 448 insertions, 0 deletions
diff --git a/queue-3.16/net-davinci_cpdma-use-dma_addr_t-for-dma-address.patch b/queue-3.16/net-davinci_cpdma-use-dma_addr_t-for-dma-address.patch
new file mode 100644
index 00000000..6ddc12db
--- /dev/null
+++ b/queue-3.16/net-davinci_cpdma-use-dma_addr_t-for-dma-address.patch
@@ -0,0 +1,78 @@
+From: Arnd Bergmann <arnd@arndb.de>
+Date: Fri, 29 Jan 2016 12:39:10 +0100
+Subject: net: davinci_cpdma: use dma_addr_t for DMA address
+
+commit 84092996673211f16ef3b942a191d7952e9dfea9 upstream.
+
+The davinci_cpdma mixes up physical addresses as seen from the CPU
+and DMA addresses as seen from a DMA master, since it can operate
+on both normal memory or an on-chip buffer. If dma_addr_t is
+different from phys_addr_t, this means we get a compile-time warning
+about the type mismatch:
+
+ethernet/ti/davinci_cpdma.c: In function 'cpdma_desc_pool_create':
+ethernet/ti/davinci_cpdma.c:182:48: error: passing argument 3 of 'dma_alloc_coherent' from incompatible pointer type [-Werror=incompatible-pointer-types]
+ pool->cpumap = dma_alloc_coherent(dev, size, &pool->phys,
+In file included from ethernet/ti/davinci_cpdma.c:21:0:
+dma-mapping.h:398:21: note: expected 'dma_addr_t * {aka long long unsigned int *}' but argument is of type 'phys_addr_t * {aka unsigned int *}'
+ static inline void *dma_alloc_coherent(struct device *dev, size_t size,
+
+This slightly restructures the code so the address we use for
+mapping RAM into a DMA address is always a dma_addr_t, avoiding
+the warning. The code is correct even if both types are 32-bit
+because the DMA master in this device only supports 32-bit addressing
+anyway, independent of the types that are used.
+
+We still assign this value to pool->phys, and that is wrong if
+the driver is ever used with an IOMMU, but that value appears to
+be never used, so there is no problem really. I've added a couple
+of comments about where we do things that are slightly violating
+the API.
+
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+Cc: Daniel Wagner <dwagner@suse.de>
+Cc: Pavel Machek <pavel@denx.de>
+Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
+---
+ drivers/net/ethernet/ti/davinci_cpdma.c | 12 ++++++------
+ 1 file changed, 6 insertions(+), 6 deletions(-)
+
+--- a/drivers/net/ethernet/ti/davinci_cpdma.c
++++ b/drivers/net/ethernet/ti/davinci_cpdma.c
+@@ -82,7 +82,7 @@ struct cpdma_desc {
+
+ struct cpdma_desc_pool {
+ phys_addr_t phys;
+- u32 hw_addr;
++ dma_addr_t hw_addr;
+ void __iomem *iomap; /* ioremap map */
+ void *cpumap; /* dma_alloc map */
+ int desc_size, mem_size;
+@@ -152,7 +152,7 @@ struct cpdma_chan {
+ * abstract out these details
+ */
+ static struct cpdma_desc_pool *
+-cpdma_desc_pool_create(struct device *dev, u32 phys, u32 hw_addr,
++cpdma_desc_pool_create(struct device *dev, u32 phys, dma_addr_t hw_addr,
+ int size, int align)
+ {
+ int bitmap_size;
+@@ -176,13 +176,13 @@ cpdma_desc_pool_create(struct device *de
+
+ if (phys) {
+ pool->phys = phys;
+- pool->iomap = ioremap(phys, size);
++ pool->iomap = ioremap(phys, size); /* should be memremap? */
+ pool->hw_addr = hw_addr;
+ } else {
+- pool->cpumap = dma_alloc_coherent(dev, size, &pool->phys,
++ pool->cpumap = dma_alloc_coherent(dev, size, &pool->hw_addr,
+ GFP_KERNEL);
+- pool->iomap = pool->cpumap;
+- pool->hw_addr = pool->phys;
++ pool->iomap = (void __iomem __force *)pool->cpumap;
++ pool->phys = pool->hw_addr; /* assumes no IOMMU, don't use this value */
+ }
+
+ if (pool->iomap)
diff --git a/queue-3.16/net-stmmac-don-t-stop-napi-processing-when-dropping-a-packet.patch b/queue-3.16/net-stmmac-don-t-stop-napi-processing-when-dropping-a-packet.patch
new file mode 100644
index 00000000..3d7ea0bb
--- /dev/null
+++ b/queue-3.16/net-stmmac-don-t-stop-napi-processing-when-dropping-a-packet.patch
@@ -0,0 +1,75 @@
+From: Aaro Koskinen <aaro.koskinen@nokia.com>
+Date: Wed, 27 Mar 2019 22:35:37 +0200
+Subject: net: stmmac: don't stop NAPI processing when dropping a packet
+
+commit 07b3975352374c3f5ebb4a42ef0b253fe370542d upstream.
+
+Currently, if we drop a packet, we exit from NAPI loop before the budget
+is consumed. In some situations this will make the RX processing stall
+e.g. when flood pinging the system with oversized packets, as the
+errorneous packets are not dropped efficiently.
+
+If we drop a packet, we should just continue to the next one as long as
+the budget allows.
+
+Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+[acj: backport v4.4 -stable
+-adjust context]
+Signed-off-by: Aviraj CJ <acj@cisco.com>
+Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
+---
+ drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 12 ++++++------
+ 1 file changed, 6 insertions(+), 6 deletions(-)
+
+--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+@@ -2060,8 +2060,7 @@ static inline void stmmac_rx_refill(stru
+ static int stmmac_rx(struct stmmac_priv *priv, int limit)
+ {
+ unsigned int rxsize = priv->dma_rx_size;
+- unsigned int entry = priv->cur_rx % rxsize;
+- unsigned int next_entry;
++ unsigned int next_entry = priv->cur_rx % rxsize;
+ unsigned int count = 0;
+ int coe = priv->plat->rx_coe;
+
+@@ -2073,9 +2072,11 @@ static int stmmac_rx(struct stmmac_priv
+ stmmac_display_ring((void *)priv->dma_rx, rxsize, 0);
+ }
+ while (count < limit) {
+- int status;
++ int status, entry;
+ struct dma_desc *p;
+
++ entry = next_entry;
++
+ if (priv->extend_desc)
+ p = (struct dma_desc *)(priv->dma_erx + entry);
+ else
+@@ -2123,7 +2124,7 @@ static int stmmac_rx(struct stmmac_priv
+ /* check if frame_len fits the preallocated memory */
+ if (frame_len > priv->dma_buf_sz) {
+ priv->dev->stats.rx_length_errors++;
+- break;
++ continue;
+ }
+
+ /* ACS is set; GMAC core strips PAD/FCS for IEEE 802.3
+@@ -2144,7 +2145,7 @@ static int stmmac_rx(struct stmmac_priv
+ pr_err("%s: Inconsistent Rx descriptor chain\n",
+ priv->dev->name);
+ priv->dev->stats.rx_dropped++;
+- break;
++ continue;
+ }
+ prefetch(skb->data - NET_IP_ALIGN);
+ priv->rx_skbuff[entry] = NULL;
+@@ -2175,7 +2176,6 @@ static int stmmac_rx(struct stmmac_priv
+ priv->dev->stats.rx_packets++;
+ priv->dev->stats.rx_bytes += frame_len;
+ }
+- entry = next_entry;
+ }
+
+ stmmac_rx_refill(priv);
diff --git a/queue-3.16/net-stmmac-use-correct-dma-buffer-size-in-the-rx-descriptor.patch b/queue-3.16/net-stmmac-use-correct-dma-buffer-size-in-the-rx-descriptor.patch
new file mode 100644
index 00000000..506217df
--- /dev/null
+++ b/queue-3.16/net-stmmac-use-correct-dma-buffer-size-in-the-rx-descriptor.patch
@@ -0,0 +1,142 @@
+From: Aaro Koskinen <aaro.koskinen@nokia.com>
+Date: Wed, 27 Mar 2019 22:35:35 +0200
+Subject: net: stmmac: use correct DMA buffer size in the RX descriptor
+
+commit 583e6361414903c5206258a30e5bd88cb03c0254 upstream.
+
+We always program the maximum DMA buffer size into the receive descriptor,
+although the allocated size may be less. E.g. with the default MTU size
+we allocate only 1536 bytes. If somebody sends us a bigger frame, then
+memory may get corrupted.
+
+Fix by using exact buffer sizes.
+
+Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+[acj: backport to v4.4 -stable :
+- Modified patch since v4.4 driver has no support for Big endian
+- Skipped the section modifying non-existent functions in dwmac4_descs.c and
+dwxgmac2_descs.c ]
+Signed-off-by: Aviraj CJ <acj@cisco.com>
+[bwh: For 3.16, don't subtract 1 from BUF_SIZE_8KiB because I already
+ backported commit 8137b6ef0ce4 "net: stmmac: Fix RX packet size > 8191".]
+Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
+---
+ drivers/net/ethernet/stmicro/stmmac/common.h | 2 +-
+ drivers/net/ethernet/stmicro/stmmac/descs_com.h | 14 ++++++++++----
+ drivers/net/ethernet/stmicro/stmmac/enh_desc.c | 10 +++++++---
+ drivers/net/ethernet/stmicro/stmmac/norm_desc.c | 10 +++++++---
+ drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 4 ++--
+ 5 files changed, 27 insertions(+), 13 deletions(-)
+
+--- a/drivers/net/ethernet/stmicro/stmmac/common.h
++++ b/drivers/net/ethernet/stmicro/stmmac/common.h
+@@ -298,7 +298,7 @@ struct dma_features {
+ struct stmmac_desc_ops {
+ /* DMA RX descriptor ring initialization */
+ void (*init_rx_desc) (struct dma_desc *p, int disable_rx_ic, int mode,
+- int end);
++ int end, int bfsize);
+ /* DMA TX descriptor ring initialization */
+ void (*init_tx_desc) (struct dma_desc *p, int mode, int end);
+
+--- a/drivers/net/ethernet/stmicro/stmmac/descs_com.h
++++ b/drivers/net/ethernet/stmicro/stmmac/descs_com.h
+@@ -33,9 +33,10 @@
+ /* Specific functions used for Ring mode */
+
+ /* Enhanced descriptors */
+-static inline void ehn_desc_rx_set_on_ring(struct dma_desc *p, int end)
++static inline void ehn_desc_rx_set_on_ring(struct dma_desc *p, int end, int bfsize)
+ {
+- p->des01.erx.buffer2_size = BUF_SIZE_8KiB;
++ if (bfsize == BUF_SIZE_16KiB)
++ p->des01.erx.buffer2_size = BUF_SIZE_8KiB;
+ if (end)
+ p->des01.erx.end_ring = 1;
+ }
+@@ -61,9 +62,14 @@ static inline void enh_set_tx_desc_len_o
+ }
+
+ /* Normal descriptors */
+-static inline void ndesc_rx_set_on_ring(struct dma_desc *p, int end)
++static inline void ndesc_rx_set_on_ring(struct dma_desc *p, int end, int bfsize)
+ {
+- p->des01.rx.buffer2_size = BUF_SIZE_2KiB - 1;
++ int size;
++
++ if (bfsize >= BUF_SIZE_2KiB) {
++ size = min(bfsize - BUF_SIZE_2KiB + 1, BUF_SIZE_2KiB - 1);
++ p->des01.rx.buffer2_size = size;
++ }
+ if (end)
+ p->des01.rx.end_ring = 1;
+ }
+--- a/drivers/net/ethernet/stmicro/stmmac/enh_desc.c
++++ b/drivers/net/ethernet/stmicro/stmmac/enh_desc.c
+@@ -238,16 +238,20 @@ static int enh_desc_get_rx_status(void *
+ }
+
+ static void enh_desc_init_rx_desc(struct dma_desc *p, int disable_rx_ic,
+- int mode, int end)
++ int mode, int end, int bfsize)
+ {
++ int bfsize1;
++
+ p->des01.all_flags = 0;
+ p->des01.erx.own = 1;
+- p->des01.erx.buffer1_size = BUF_SIZE_8KiB;
++
++ bfsize1 = min(bfsize, BUF_SIZE_8KiB);
++ p->des01.erx.buffer1_size = bfsize1;
+
+ if (mode == STMMAC_CHAIN_MODE)
+ ehn_desc_rx_set_on_chain(p, end);
+ else
+- ehn_desc_rx_set_on_ring(p, end);
++ ehn_desc_rx_set_on_ring(p, end, bfsize);
+
+ if (disable_rx_ic)
+ p->des01.erx.disable_ic = 1;
+--- a/drivers/net/ethernet/stmicro/stmmac/norm_desc.c
++++ b/drivers/net/ethernet/stmicro/stmmac/norm_desc.c
+@@ -121,16 +121,20 @@ static int ndesc_get_rx_status(void *dat
+ }
+
+ static void ndesc_init_rx_desc(struct dma_desc *p, int disable_rx_ic, int mode,
+- int end)
++ int end, int bfsize)
+ {
++ int bfsize1;
++
+ p->des01.all_flags = 0;
+ p->des01.rx.own = 1;
+- p->des01.rx.buffer1_size = BUF_SIZE_2KiB - 1;
++
++ bfsize1 = min(bfsize, (BUF_SIZE_2KiB - 1));
++ p->des01.rx.buffer1_size = bfsize1;
+
+ if (mode == STMMAC_CHAIN_MODE)
+ ndesc_rx_set_on_chain(p, end);
+ else
+- ndesc_rx_set_on_ring(p, end);
++ ndesc_rx_set_on_ring(p, end, bfsize);
+
+ if (disable_rx_ic)
+ p->des01.rx.disable_ic = 1;
+--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+@@ -933,11 +933,11 @@ static void stmmac_clear_descriptors(str
+ if (priv->extend_desc)
+ priv->hw->desc->init_rx_desc(&priv->dma_erx[i].basic,
+ priv->use_riwt, priv->mode,
+- (i == rxsize - 1));
++ (i == rxsize - 1), priv->dma_buf_sz);
+ else
+ priv->hw->desc->init_rx_desc(&priv->dma_rx[i],
+ priv->use_riwt, priv->mode,
+- (i == rxsize - 1));
++ (i == rxsize - 1), priv->dma_buf_sz);
+ for (i = 0; i < txsize; i++)
+ if (priv->extend_desc)
+ priv->hw->desc->init_tx_desc(&priv->dma_etx[i].basic,
diff --git a/queue-3.16/pstore-ram-write-new-dumps-to-start-of-recycled-zones.patch b/queue-3.16/pstore-ram-write-new-dumps-to-start-of-recycled-zones.patch
new file mode 100644
index 00000000..65acd031
--- /dev/null
+++ b/queue-3.16/pstore-ram-write-new-dumps-to-start-of-recycled-zones.patch
@@ -0,0 +1,45 @@
+From: Aleksandr Yashkin <a.yashkin@inango-systems.com>
+Date: Mon, 23 Dec 2019 18:38:16 +0500
+Subject: pstore/ram: Write new dumps to start of recycled zones
+
+commit 9e5f1c19800b808a37fb9815a26d382132c26c3d upstream.
+
+The ram_core.c routines treat przs as circular buffers. When writing a
+new crash dump, the old buffer needs to be cleared so that the new dump
+doesn't end up in the wrong place (i.e. at the end).
+
+The solution to this problem is to reset the circular buffer state before
+writing a new Oops dump.
+
+Signed-off-by: Aleksandr Yashkin <a.yashkin@inango-systems.com>
+Signed-off-by: Nikolay Merinov <n.merinov@inango-systems.com>
+Signed-off-by: Ariel Gilman <a.gilman@inango-systems.com>
+Link: https://lore.kernel.org/r/20191223133816.28155-1-n.merinov@inango-systems.com
+Fixes: 896fc1f0c4c6 ("pstore/ram: Switch to persistent_ram routines")
+[kees: backport to v4.9]
+Signed-off-by: Kees Cook <keescook@chromium.org>
+Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
+---
+ fs/pstore/ram.c | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
+
+--- a/fs/pstore/ram.c
++++ b/fs/pstore/ram.c
+@@ -273,6 +273,17 @@ static int notrace ramoops_pstore_write_
+
+ prz = cxt->przs[cxt->dump_write_cnt];
+
++ /*
++ * Since this is a new crash dump, we need to reset the buffer in
++ * case it still has an old dump present. Without this, the new dump
++ * will get appended, which would seriously confuse anything trying
++ * to check dump file contents. Specifically, ramoops_read_kmsg_hdr()
++ * expects to find a dump header in the beginning of buffer data, so
++ * we must to reset the buffer values, in order to ensure that the
++ * header will be written to the beginning of the buffer.
++ */
++ persistent_ram_zap(prz);
++
+ hlen = ramoops_write_kmsg_hdr(prz, compressed);
+ if (size + hlen > prz->buffer_size)
+ size = prz->buffer_size - hlen;
diff --git a/queue-3.16/series b/queue-3.16/series
index 920bf64b..c1eae8f1 100644
--- a/queue-3.16/series
+++ b/queue-3.16/series
@@ -1,2 +1,8 @@
alsa-line6-drop-superfluous-snd_device-for-pcm.patch
alsa-line6-fix-memory-leak-at-line6_init_pcm-error-path.patch
+x86-treat-r_x86_64_plt32-as-r_x86_64_pc32.patch
+pstore-ram-write-new-dumps-to-start-of-recycled-zones.patch
+net-davinci_cpdma-use-dma_addr_t-for-dma-address.patch
+stmmac-fix-oversized-frame-reception.patch
+net-stmmac-use-correct-dma-buffer-size-in-the-rx-descriptor.patch
+net-stmmac-don-t-stop-napi-processing-when-dropping-a-packet.patch
diff --git a/queue-3.16/stmmac-fix-oversized-frame-reception.patch b/queue-3.16/stmmac-fix-oversized-frame-reception.patch
new file mode 100644
index 00000000..93ae4780
--- /dev/null
+++ b/queue-3.16/stmmac-fix-oversized-frame-reception.patch
@@ -0,0 +1,37 @@
+From: Giuseppe CAVALLARO <peppe.cavallaro@st.com>
+Date: Thu, 26 Nov 2015 08:35:45 +0100
+Subject: stmmac: fix oversized frame reception
+
+commit e527c4a769d375ac0472450c52bde29087f49cd9 upstream.
+
+The receive skb buffers can be preallocated when the link is opened
+according to mtu size.
+While testing on a network environment with not standard MTU (e.g. 3000),
+a panic occurred if an incoming packet had a length greater than rx skb
+buffer size. This is because the HW is programmed to copy, from the DMA,
+an Jumbo frame and the Sw must check if the allocated buffer is enough to
+store the frame.
+
+Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
+Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
+---
+ drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+@@ -2120,6 +2120,12 @@ static int stmmac_rx(struct stmmac_priv
+
+ frame_len = priv->hw->desc->get_rx_frame_len(p, coe);
+
++ /* check if frame_len fits the preallocated memory */
++ if (frame_len > priv->dma_buf_sz) {
++ priv->dev->stats.rx_length_errors++;
++ break;
++ }
++
+ /* ACS is set; GMAC core strips PAD/FCS for IEEE 802.3
+ * Type frames (LLC/LLC-SNAP)
+ */
diff --git a/queue-3.16/x86-treat-r_x86_64_plt32-as-r_x86_64_pc32.patch b/queue-3.16/x86-treat-r_x86_64_plt32-as-r_x86_64_pc32.patch
new file mode 100644
index 00000000..e463ceb3
--- /dev/null
+++ b/queue-3.16/x86-treat-r_x86_64_plt32-as-r_x86_64_pc32.patch
@@ -0,0 +1,65 @@
+From: "H.J. Lu" <hjl.tools@gmail.com>
+Date: Wed, 7 Feb 2018 14:20:09 -0800
+Subject: x86: Treat R_X86_64_PLT32 as R_X86_64_PC32
+
+commit b21ebf2fb4cde1618915a97cc773e287ff49173e upstream.
+
+On i386, there are 2 types of PLTs, PIC and non-PIC. PIE and shared
+objects must use PIC PLT. To use PIC PLT, you need to load
+_GLOBAL_OFFSET_TABLE_ into EBX first. There is no need for that on
+x86-64 since x86-64 uses PC-relative PLT.
+
+On x86-64, for 32-bit PC-relative branches, we can generate PLT32
+relocation, instead of PC32 relocation, which can also be used as
+a marker for 32-bit PC-relative branches. Linker can always reduce
+PLT32 relocation to PC32 if function is defined locally. Local
+functions should use PC32 relocation. As far as Linux kernel is
+concerned, R_X86_64_PLT32 can be treated the same as R_X86_64_PC32
+since Linux kernel doesn't use PLT.
+
+R_X86_64_PLT32 for 32-bit PC-relative branches has been enabled in
+binutils master branch which will become binutils 2.31.
+
+[ hjl is working on having better documentation on this all, but a few
+ more notes from him:
+
+ "PLT32 relocation is used as marker for PC-relative branches. Because
+ of EBX, it looks odd to generate PLT32 relocation on i386 when EBX
+ doesn't have GOT.
+
+ As for symbol resolution, PLT32 and PC32 relocations are almost
+ interchangeable. But when linker sees PLT32 relocation against a
+ protected symbol, it can resolved locally at link-time since it is
+ used on a branch instruction. Linker can't do that for PC32
+ relocation"
+
+ but for the kernel use, the two are basically the same, and this
+ commit gets things building and working with the current binutils
+ master - Linus ]
+
+Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
+Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
+[Woody Suwalski: Backported to 3.16]
+Signed-off-by: Woody Suwalski <terraluna977@gmail.com>
+Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
+---
+--- a/arch/x86/kernel/module.c
++++ b/arch/x86/kernel/module.c
+@@ -180,6 +180,7 @@ int apply_relocate_add(Elf64_Shdr *sechd
+ goto overflow;
+ break;
+ case R_X86_64_PC32:
++ case R_X86_64_PLT32:
+ val -= (u64)loc;
+ *(u32 *)loc = val;
+ #if 0
+--- a/arch/x86/tools/relocs.c
++++ b/arch/x86/tools/relocs.c
+@@ -763,6 +763,7 @@ static int do_reloc64(struct section *se
+ switch (r_type) {
+ case R_X86_64_NONE:
+ case R_X86_64_PC32:
++ case R_X86_64_PLT32:
+ /*
+ * NONE can be ignored and PC relative relocations don't
+ * need to be adjusted.